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AD7851

–14–

REV. B

FINISHED

LAST

WRITE

OPERATION

ABORT

YES

CAL REGISTER POINTER IS

AUTOMATICALLY INCREMENTED

READ CAL REGISTER

CAL REGISTER POINTER IS

AUTOMATICALLY RESET

WRITE TO CONTROL REGISTER SETTING STCAL = 0, RDSLT1 = 1,

RDSLT0 = 0, AND CALSLT1, CALSLT0 = 00, 01, 10, 11

START

Figure 9. Flowchart for Reading from the

Calibration Registers

Adjusting the Offset Calibration Register

The offset calibration register contains 16 bits, 2 leading 0s, and

14 data bits. By changing the contents of the offset register, dif-

ferent amounts of offset on the analog input signal can be com-

pensated for. Increasing the number in the offset calibration

signal, and decreasing the number in the offset calibration regis-

ter compensates for the positive offset on the analog input signal.

The default value of the offset calibration register is approxi-

mately 0010 0000 0000 0000. This is not an exact value, but the

value in the offset register should be close to this value. Each of

the 14 data bits in the offset register is binary weighted; the MSB

has a weighting of 5% of the reference voltage, the MSB-1 has a

weighting of 2.5%, the MSB-2 has a weighting of 1.25%, and so

on down to the LSB which has a weighting of 0.0006%.

This gives a resolution of

± 0.0006% of VREF approximately.

More accurately the resolution is

± (0.05 × V

REF)/2

13 V =

±0.015 mV, with a 2.5 V reference. The maximum offset that

can be compensated for is

±5% of the reference voltage, which

equates to

±125 mV with a 2.5 V reference and ±250 mV with

a 5 V reference.

Q. If a +20 mV offset is present in the analog input signal and

the reference voltage is 2.5 V, what code needs to be written

to the offset register to compensate for the offset?

A. The 2.5 V reference implies that the resolution in the off-

set register is 5%

× 2.5 V/213 = 0.015 mV. 20 mV/

0.015 mV = 1310.72; rounding to the nearest number gives

1311. In binary terms this is 0101 0001 1111, therefore

decrease the offset register by 0101 0001 1111.

This method of compensating for offset in the analog input signal

allows for fine-tuning the offset compensation. If the offset on the

analog input signal is known, there will be no need to apply the

offset voltage to the analog input pins to do a system calibration.

The offset compensation can take place in software.

Adjusting the Gain Calibration Register

The gain calibration register contains 16 bits, 2 leading 0s, and

14 data bits. The data bits are binary weighted as in the offset

calibration register. The gain register value is effectively multi-

plied by the analog input to scale the conversion result over the

full range. Increasing the gain register compensates for a

smaller analog input range and decreasing the gain register

compensates for a larger input range. The maximum analog

input range that the gain register can compensate for is 1.025

times the reference voltage, and the minimum input range is

0.975 times the reference voltage.

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