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APL5338A Datasheet(PDF) 11 Page - Anpec Electronics Coropration |
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APL5338A Datasheet(HTML) 11 Page - Anpec Electronics Coropration |
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11 / 21 page ![]() Copyright © ANPEC Electronics Corp. Rev. A.2 - Aug., 2013 APL5338A www.anpec.com.tw 11 Function Description VTT Source/Sink Regulator The APL5338A is a low dropout source/sink linear regu- lator with maximum 2A source/sink current. Two internal N-channel MOSFETs controlled by separate high band- width error amplifiers regulate the output voltage by sourc- ing current from VIN or sinking current to PGND. To pre- vent two pass elements from shoot-through, a voltage offset is created between two positive inputs of the error amplifiers. Power-On-Reset (POR) The APL5338A monitors the VCNTL pin voltage for power- on-reset function to prevent erroneous operation. The built-in POR circuit keeps the outputs shutoff until inter- nal circuit is operating properly. Typical POR threshold is 2.8V with 0.2V hysteresis. VTTREF Regulator VTTREF voltage follows 1/2VREF voltage which is the reference of the VTT regulator. The VTTREF block con- sists of a resistor divider and a low pass filter. The regu- lator can source current up to 20mA (typical). To insure the stability, a 0.1 µF ceramic capacitor should be con- nected from VTTREF to GND. Soft-Start and Current Limit The APL5338A monitors the output current, both sourc- ing and sinking current, and limits the maximum output current to prevent damages during current overload or short circuit (shorted from VOUT to GND or VIN) conditions. The APL5338A provides a soft-start function, using the constant current to charge the output capacitor that gives a rapid and linear output voltage rise. If the load current is above the current limit start-up, the VTT cannot start successfully. Table1. The truth table of S3 and S5 pins STATE S3 S5 VTTREF VTT S0 H H 1 1 S3 L H 1 0(high-Z) S4/5 L L 0(discharge) 0(discharge) S3, S5 Control The S3 and S5 signals control the VTT and VTTREF states and these pins should be connected to SLP_S3 and SLP_S5 signals respectively. The table1 shows the truth table of the S3 and S5 pins. When both S3 and S5 are above the logic threshold voltage, the VTT and VTTREF are turned on at S0 state. When S3 is low and S5 is high, the VTT voltage is disabled and left high impedance in S3 state. When both S3 and S5 are low, the VTT and VTTREF are turned off and discharged to the ground through internal MOSFETs during S4/S5 state. (Note that if the S3 is forced high and S5 is forced low, then VTTREF is discharged and VTT is at high-Z state. Such condition is not recommended.) Thermal Shutdown A thermal shutdown circuit limits the junction tempera- ture of the APL5338A. When the junction temperature ex- ceeds +150oC, the device will turn off the MOSFETs, al- lowing the device to cool down. The regulator regulates the output again through initiation of a new soft-start cycle after the junction temperature cools by 30oC, resulting in a pulsed output during continuous thermal overload conditions. The thermal shutdown is designed with a 30oC hysteresis to lower the average junction tempera- ture during continuous thermal overload conditions, ex- tending lifetime of the device. For normal operation, de- vice power dissipation should be externally limited so that junction temperatures will not exceed +125oC. |
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