APW7063 datasheet(12/22 Pages) ANPEC

12 / 22 page

Rev. A.10 - Aug., 2009

APW7063

www.anpec.com.tw

TSoft-Start = t1 - t0 =

0.8V

SS ×

t3 = t2

0.8V

SS ×

VREG (Pin 3)

An internal regulator will supply 6V for boost voltage, a

µF capacitor to GND is recommended for stability. If the

VREG voltage has variation by other interference, the IC

can not work normally. When the VCC<8V, don’t use the

VREG for BOOST voltage.

FB (Pin 4)

FB pin is the inverting input of the error amplifier, and it

receives the feedback voltage from an external resistive

divider across the output (V

OUT). The output voltage is de-

termined by :

Function Pin Description

RT (Pin 1)

This pin can adjust the switching frequency. Connect a

resistor from RT to VCC for decreasing the switching

frequency. Conversely, connect a resistor from RT to GND

for increasing the switching frequency (See Typical

Characteristics).

SS (Pin 2)

Connect a capacitor from this pin to GND to set the soft-

start interval of the converter. An internal 10

µA current

source charges this capacitor to 5.2V. The SS voltage

clamps the reference voltage to the SS voltage, and Fig-

ure1 shows the soft-start interval. At t0, the internal source

current starts to charge the capacitor and the internal 0.8V

reference also starts to rise and follows the SS. Until the

internal reference reaches to 0.8V at t2, the soft-start in-

terval is completed. This method provides a rapid and

controlled output voltage rise. The way of the Soft-Start of

the output2 is the same as the output1, but it starts from

the SS at 2.2V to 3.0V. The APW7063 also provides the

internal Soft-Start which is fixed to 2ms (t0 to t1). If the

external Soft-Start interval is slower than the internal Soft-

Start interval (CSS<0.025

µF) or no external capacitor,

the Soft-Start will follow the internal Soft-Start.











 +

GND

OUT

0.8V

where ROUT is the resistor connected from V

OUT to FB,

and RGND is the resistor connected from FB to GND.

When the FB voltage is under 50% Vref, it will cause the

under voltage protection and shutdown the device. Re-

move the condition and restart the VCC voltage or pull the

COMP from low to high once will enable the device again.

Figure 1. Soft-Start Interval

Where:

CSS = external Soft-Start capacitor

ISS = Soft-Start current = 10

µA

t2 =

2.2

SS ×

COMP (Pin 5)

This pin is the output of the error amplifier. Add an exter-

nal resistor and capacitor network to provide the loop

compensation for the PW M converter (See Applica-

tion Information).

TIME

VOLTAGE

SOFT-START

OUT2

OUT1

FBL

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