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APW7068 Datasheet(PDF) 13 Page - Anpec Electronics Coropration

Part # APW7068
Description  Synchronous Buck PWM and Linear Controller with 0.8V Reference Out Voltage
PDF  26 Pages
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Manufacturer  ANPEC [Anpec Electronics Coropration]
Direct Link  http://www.anpec.com.tw
Logo ANPEC - Anpec Electronics Coropration

APW7068 Datasheet(HTML) 13 Page - Anpec Electronics Coropration

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Copyright
© ANPEC Electronics Corp.
Rev. A.6 - Aug., 2009
APW7068
www.anpec.com.tw
13
Function Description
Figure 2. The Controlled Stepped FB and FBL Voltage
During Soft-Start
Figure 1. Soft-Start Interval
2560
F
1
)
t
t
(
T
OSC
1
2
SS
×
=
−
∆
=
SS
OSC
3
4
T
4
1
640
F
1
)
t
t
(
×
=
×
=
−
∆
Voltage(V)
20mV
20mV
32/F
OSC
32/F
OSC
t
3
t
4
Time
V
FB
V
FBL
Side)
(L
R
R
I
I
OW
DS(ON)
OCSET
OCSET
LIMIT
−
×
=
Power-On-Reset (POR)
The Power-On-Reset (POR) function of APW7068 con-
tinually monitors the input supply voltage (V
CC12), ensures
the supply voltage exceed its rising POR threshold
voltage. The POR function initiates soft-start interval op-
eration while VCC12 voltage exceeds its POR threshold
and inhibits operation under disabled status.
Soft-Start
Figure 1. shows the soft-start interval. When V
CC12 reaches
the rising POR threshold voltage, the internal reference
voltage is controlled to follow a voltage proportional to the
soft-start voltage. The soft-start interval is variable by the
oscillator frequency. The formulation is given by:
Figure 2. shows more detail of the FB and FBL voltage
ramps. The FB and FBL voltage soft-start ramps are formed
with many small steps of voltage. The voltage of one step
is about 20mV in V
FB and VFBL, and the period of one step
is about 32/FOSC. This method provides a controlled
voltage rise and prevents the large peak current to charge
the output capacitors. The FB voltage compares the FBL
voltage to shift to an earlier time the establishment as
Figure2. The voltage estabilishment time difference for
V
FB and VFBL is variable by the oscillator. The formulation
is given by:
Voltage (V)
Time
V
CC12
V
OUT1
t
0
POR
V
OUT2
t
1
t
2
Over-Current Protection
Connect a resistor (R
OCSET) from this pin to GND, an inter-
nal 40
µA current source will flow through this resistor
and create a voltage drop, which will be compared with
the voltage across the lower MOSFET. When the voltage
across the lower MOSFET exceeds the voltage drop
across the R
OCSET, an over-current condition is detected
and the controller will shutdown the IC directly, and the
converter's output is latched.
The APW7068 has a internal OCP voltage source, and
the value is around 0.25V. When the R
OCSET x IOCSET is
bigger than 0.25V or the OCSET PIN is floating (no R
OCSET
resistor), the over current threshold will be the internal
default value 0.25V.
The threshold of the over current limit is therefore given
by:
For the over-current is never occurred in the normal oper-
ating load range; the variation of all parameters in the
above equation should be determined.
- The MOSFET’s R
DS(ON) is varied by temperature and gate
to source voltage, the user should determine the maxi-
mum R
DS(ON) in manufacturer’
s datasheet.
- The minimum I
OCSET (36µA) and minimum ROCSET should
be used in the above equation.
- Note that the I
LIMIT is the current flow through the lower
MOSFET; I
LIMIT must be greater than maximum output
current add the half of inductor ripple current.



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