APW8722C datasheet(14/23 Pages) ANPEC

14 / 23 page

Rev. A.3 - Jun., 2013

www.anpec.com.tw

APW8722/A/B/C/D

Function Description (Cont.)

Under-Voltage Protection

Over-Voltage Protection (OVP) of the PWM Converter

The over-voltage protection monitors the FB voltage to

prevent the output from over-voltage condition. When the

output voltage rises above 125% of the nominal output

voltage, the APW8722 turns off the high-side MOSFET

and turns on the low-side MOSFET until the output volt-

age falls below the falling below 105%, the OVP com-

parator is disengaged and both high-side and low-side

drivers turn off.

Shutdown and Enable

The APW8722 can be shut down or enabled by pulling

low the voltage on COMP. The COMP is a dual-function

pin. During normal operation, this pin represents the out-

put of the error amplifier. It is used to compensate the

regulation control loop in combination with the FB pin.

Pulling the COMP low (V

DISABLE = 0.4V maximum) places

the controller into shutdown mode which UGATE and

LGATE are pulled to PHASE and GND respectively.

When the pull-down device is released, the COMP volt-

age will start to rise. When the COMP voltage rises above

the V

DISABLE threshold, the APW8722 will begin a new ini-

tialization and soft-start process.

Adaptive Shoot-Through Protection of the PWM Con-

verter

The gate drivers incorporate an adaptive shoot-through

protection to prevent high-side and low-side MOSFETs

from conducting simultaneously and shorting the input

supply. This is accomplished by ensuring the falling gate

has turned off one MOSFET before the other is allowed to

rise.

During turn-off the low-side MOSFET, the LGATE voltage

is monitored until it is below 1.5V threshold, at which

time the UGATE is released to rise after a constant delay.

During turn-off of the high-side MOSFET, the UGATE-to-

PHASE voltage is also monitored until it is below 1.5V

threshold, at which time the LGATE is released to rise

after a constant delay.

The under-voltage function monitors the voltage on FB

FB) by Under-Voltage (UV) comparator to protect the PWM

converter against short-circuit conditions. When the V

falls below the falling UVP threshold (50% V

REF), a fault

signal is internally generated and the device turns off high-

side and low-side MOSFETs. The device will enters hic-

cup mode until the under-voltage phenomenon is

released.

This OVP scheme only clamps the voltage overshoot and

does not invert the output voltage when otherwise acti-

vated with a continuously high output from low-side

MOSFET driver. It’s a common problem for OVP schemes

with a latch. Once an over-voltage fault condition is set, it

can be reset by releasing COMP or toggling VCC power-

on-reset signal.

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