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SP6656 Datasheet(PDF) 8 Page - Sipex Corporation |
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SP6656 Datasheet(HTML) 8 Page - Sipex Corporation |
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8 / 16 page ![]() 8 Date: 3/6/06 SP6656, 400mA Synchronous Buck Regulator with Dynamically Adjustable Voltage Output © Copyright 2006 Sipex Corporation THEORY OF OPERATION The SP6656 is a high efficiency synchro- nous buck regulator with an input voltage range of +2.7V to +5.5V and an output that is adjustable between +1.0V and VIN. The SP6656 features a unique on-time control loop that runs in discontinuous conduction mode (DCM) or continuous conduction mode (CCM) using synchronous rectification. Other features include over-temperature shutdown, over-current protection, an ex- ternal feedback pin, digitally controlled en- able and output voltage selection. The SP6656 operates with a light load qui- escent current of 20µA using a 0.3Ω PMOS main switch and a 0a.3Ω NMOS synchro- nous switch. It operates with excellent effi- ciency across the entire load range, making it an ideal solution for battery powered ap- plications and low current step-down con- versions. The part smoothly transitions into a 100% duty cycle under heavy load/low input voltage conditions. On-Time Control - Charge Phase The SP6656 uses a precision comparator and a minimum on-time to regulate the output voltage and control the inductor cur- rent under normal load conditions. As the feedback pin drops below the regulation point, the loop comparator output goes high and closes the main switch. The minimum on-timer is triggered, setting a logic high for the duration defined by: TON = KON . VIN - VOUT where: KON = 2.25V*µSec constant VIN = VIN pin voltage VOUT = VOUT pin voltage To accommodate the use of ceramic and other low ESR capacitors, an open loop ramp is added to the feedback signal to mimic the inductor current ripple. The fol- lowing waveforms describe the ideal ramp operation in both CCM and DCM operation. In either CCM or DCM, the negative going ramp voltage (VRAMP in the functional dia- gram) is added to FB and this creates the FB's signal. This FB signal is applied to the negative terminal of the loop comparator. To the positive terminal of the loop com- parator is applied the REF voltage of 0.8V plus an offset voltage Vos to compensate for the DC level of VRAMP applied to the negative terminal. The result is an internal ramp with enough negative going offset (approximately 50mV) to trip the loop com- parator whenever FB falls below regulation. The output of the loop comparator, a rising VOLOW, causes a SET if BLANK = 0 and OVR_I = 0. This starts inductor charging (DRVON = 1) and starts the minimum on- DRVON REF, FB VOS REF’ FB’ I(L1) RAMP: DCM OPERATION DRVON REF, FB VOS REF’ FB’ I(L1) RAMP: CCM OPERATION |
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