Product Specification

PE97022

Page 2 of 14

©2010-2013 Peregrine Semiconductor Corp. All rights reserved.

Table 1. Pin Descriptions

Figure 2. Pin Configurations (Top View)

44-lead CQFJ

Figure 3. Package Type

Pin No.

Pin Name

Interface Mode

Type

Description

1

ALL

(Note 1)

Power supply input. Input may range from 2.85 V to 3.45 V. Bypassing recommended.

2

Direct

Input

R Counter bit0 (LSB).

3

Direct

Input

R Counter bit1.

4

Direct

Input

R Counter bit2.

5

Direct

Input

R Counter bit3.

6

GND

ALL

Ground.

7

Parallel

Input

Parallel data bus bit0 (LSB).

Direct

Input

M Counter bit0 (LSB).

8

Parallel

Input

Parallel data bus bit1.

Direct

Input

M Counter bit1.

9

Parallel

Input

Parallel data bus bit2.

Direct

Input

M Counter bit2.

10

Parallel

Input

Parallel data bus bit3.

Direct

Input

M Counter bit3.

11

ALL

(Note 1)

Power supply input. Input may range from 2.85 V to 3.45 V. Bypassing recommended.

12

ALL

(Note 1)

Power supply input. Input may range from 2.85 V to 3.45 V. Bypassing recommended.

13

S_WR

Serial

Input

Serial load enable input. While S_WR is “low”, Sdata can be serially clocked. Primary

register data is transferred to the secondary register on S_WR or Hop_WR rising

edge.

Parallel

Input

Parallel data bus bit4

Direct

Input

M Counter bit4