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TLK111PT Datasheet(PDF) 8 Page - Texas Instruments |
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TLK111PT Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 109 page  TLK111 SLLSEF8A – AUGUST 2013 – REVISED NOVEMBER 2013 www.ti.com 3 Hardware Configuration This section includes information on the various configuration options available with the TLK111. The configuration options described below include: • Bootstrap Configuration • PHY Address • Power Supply Configuration • Software Strapping Mode • IO Pins Hi-Z State During Reset • LED Interface • Auto-Negotiation • Loopback Functionality • Auto-MDIX • BIST • MII Isolate mode • Cable Diagnostics 3.1 Bootstrap Configuration Bootstrap configuration is a convenient way to configure the TLK111 into specific modes of operation. Some of the functional pins are used as configuration inputs. The logic states of these pins are sampled during reset and are used to configure the device into specific modes of operation. The table below describes bootstrap configuration. A 2.2k Ω resistor is used for pull-down or pull-up to change the default configuration. If the default option is desired, then there is no need for external pull-up or pull down resistors. Because these pins may have alternate functions after reset is deasserted, they must not be connected directly to VCC or GND. PIN TYPE NAME NO. DESCRIPTION PHYAD0 (COL) 42 PHY Address [4:0]: The TLK111 provides five PHY address pins, the states of which are latched PHYAD1 (RXD_0) 43 into an internal register at system hardware reset. The TLK111 supports PHY Address values 0 S, O, PD / PHYAD2 (RXD_1) 44 (<00000>) through 31 (<11111>). PHYAD[4:1] pins have weak internal pull-down resistors, and PU PHYAD3 (RXD_2) 45 PHYAD[0] has weak internal pull-up resistor, setting the default PHYAD if no external resistors PHYAD4 (RXD_3) 46 are connected. Software Strapping Mode: The TLK111 provides a mechanism to extend the number of configuration pins to allow wider system programmability of PHY functions. An external pull-down will cause the device to enter SW Strapping Mode. In this mode the device will wake up after Power-up or Reset in Power-Down mode, this will allow the system processor to access SW_STRAP 21 I dedicated Strapping Registers and configure modes of operation. An access to SW Strapping Mode Release register must be done to take the device out of power-down mode. See Section 3.8 for more details. An external pull-up resistor should be used to disable Software Strapping Mode. 8 Hardware Configuration Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLK111 |
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