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3971 Datasheet(PDF) 3 Page - Allegro MicroSystems

Part # 3971
Description  DUAL DMOS FULL-BRIDGE DRIVER
PDF  8 Pages
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Manufacturer  ALLEGRO [Allegro MicroSystems]
Direct Link  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

3971 Datasheet(HTML) 3 Page - Allegro MicroSystems

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3971
DUAL DMOS
FULL-BRIDGE DRIVER
www.allegromicro.com
ELECTRICAL CHARACTERISTICS at T
A = +25°C, VBB = 50 V, VDD = 5.0 V (unless otherwise noted).
Limits
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Units
Load Supply Voltage Range
V
BB
Operating
10
50
V
Logic Supply Voltage Range
V
DD
Operating
4.5
5.0
5.5
V
Load Supply Current
I
BB
Operating, each supply, no load
3.0
mA
Logic Supply Current
I
DD
Operating
5.0
mA
Output Drivers
Output Leakage Current
I
DSS
V
OUT = VBB
<1.0
20
µA
V
OUT = 0 V
<-1.0
-20
mA
Output ON Resistance
r
DS(on)
High-side switch, I
OUT = -2.5 A
325
375
m
Low-side switch, I
OUT = 2.5 A
175
200
m
Body Diode Forward Voltage
V
F
Source diode, I
F = 2.5 A
1.2
V
Sink diode, I
F = 2.5 A
1.0
V
High-Side Gate Voltage
V
CP
C = 0.22
µF, reference V
BB
6.0
6.5
7.0
V
Control Logic
Logic Input Voltage
V
IN(0)
——
0.8
V
V
IN(1)
2.0
V
Logic Input Current
I
IN(0)
V
IN = 0 V
<1.0
-5.0
µA
I
IN(1)
V
IN = 5.0 V
20
50
µA
Propagation Delay Time
t
PD
50% to 90%:
PWM change to source off
50
ns
PWM change to sink off
60
ns
PWM change to source on
565
ns
PWM change to sink on
665
ns
Disable to source on
150
ns
Disable to sink on
250
ns
Thermal Shutdown Temperature
T
J
165
°C
Thermal Shutdown Hysteresis
∆T
J
—15
°C
UVLO Threshold
V
UVLO
Increasing V
DD
3.9
4.15
4.4
V
UVLO Hysteresis
∆V
UVLO
—0.15—
V
NOTES:
1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.



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