PCI1520PDVG4 datasheet(81/139 Pages) TI

81 / 139 page

4−20

Table 4−9. Multifunction Routing Register Description (Continued)

BIT

SIGNAL

TYPE

FUNCTION

7−4

MFUNC1

Multifunction terminal 1 configuration. These bits control the internal signal mapped to the MFUNC1 terminal

as follows:

NOTE: When the serial bus mode is implemented by pulling down the LATCH terminal, the MFUNC1 terminal

provides the SDA signaling.

0000 = GPI1†

0100 = IRQ4

1000 = CAUDPWM

1100 = LEDA1

0001 = GPO1

0101 = IRQ5

1001 = IRQ9

1101 = LEDA2

0010 = INTB

0110 = ZVSTAT

1010 = IRQ10

1110 = GPE

0011 = IRQ3

0111 = ZVSEL0

1011 = IRQ11

1111 = IRQ15

3−0

MFUNC0

Multifunction terminal 0 configuration. These bits control the internal signal mapped to the MFUNC0 terminal

as follows:

0000 = GPI0†

0100 = IRQ4

1000 = CAUDPWM

1100 = LEDA1

0001 = GPO0

0101 = IRQ5

1001 = IRQ9

1101 = LEDA2

0010 = INTA

0110 = ZVSTAT

1010 = IRQ10

1110 = GPE

0011 = IRQ3

0111 = ZVSEL0

1011 = IRQ11

1111 = IRQ15

† Default value

PCI1520PDVG4 Datasheet(PDF) 81 Page - Texas Instruments

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