MP28127 – 1.25A, 5.5V SYNCHRONOUS STEP-DOWN SWITCHING REGULATOR

MP28127 Rev. 0.9

www.MonolithicPower.com

3

6/7/2010

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Parameters

Condition

Min

Typ

Max

Units

High-Side Switch Current Limit

Sourcing

2.0

A

Low-Side Switch Current Limit

Sinking

2.5

A

Oscillator Frequency

1.2

1.5

1.8

MHz

Maximum Synch Frequency

2

MHz

Minimum Synch Frequency

1

MHz

Minimum On Time

50

ns

Maximum Duty Cycle

90

%

POK Upper Trip Threshold

FB respect to the nominal value

10

%

POK Lower Trip Threshold

FB respect to the nominal value

-10

%

POK Output Voltage Low

0.4

V

POK Deglitch Timer

30

µs

Thermal Shutdown Threshold

Hysteresis = 20°C

150

°C

Note:

4) Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization.

PIN FUNCTIONS

Pin #

Name

Description

6

POK

4, 7

IN

Input Supply. A decoupling capacitor to ground is required close to these pins to reduce

switching spikes.

3, 8

SW

Switch Node Connection to the Inductor. These pins connect to the internal high and low-

side power MOSFET switches. All SW pins must be connected together externally.

2, 9

GND,

Exposed Pad

Ground. Connect these pins with larger copper areas to the negative terminals of the input

and output capacitors. Connect exposed pad to GND plane for optimal thermal

performance.

5

BS

Bootstrap. A capacitor between this pin and SW provides a floating supply for the high-

side gate driver.

1

FB

Feedback. This is the input to the error amplifier. An external resistive divider connects

this pin between the output and GND. The voltage on the FB pin compares to the internal

0.8V reference to set the regulation voltage.

10

EN/SYNC

Enable and Frequency Synchronization Input Pin. Forcing this pin below 0.4V shuts down

the part. Forcing this pin above 1.6V turns on the part. Applying a 1MHz to 2MHz clock

signal to this pin synchronizes the internal oscillator frequency to the external source.