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MP44011 Datasheet(PDF) 13 Page - Monolithic Power Systems

Part # MP44011
Description  Boundary-Mode PFC Controller with Harmonic Injection
PDF  15 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP44011 Datasheet(HTML) 13 Page - Monolithic Power Systems

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MP44011 – BOUNDARY-MODE PFC CONTROLLER WITH HARMONIC INJECTION
MP44011 Rev. 1.01
www.MonolithicPower.com
13
1/12/2012
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
The turn ratio is:
R
OUT
V
n=
=3
V
Then Ap is:
P
PKp
RMSp
94
pe
w
max
c
LI
I
A =A A =
1.27 10 mm
BK j



Where:
Ae is the effective area of the core section;
Aw is the effective area of the core window;
Bmax is the max swing of the magnetic flux density
(generally Bmax=0.3~0.4T);
Kc is the window coefficient, which is about 0.3 in
design;
j is the current density of the wire, which is
typically 4-6A/mm2.
The EE25 core is selected according to Ap.
The primary inductor turn number is:
pPKp
p
max
e
LI
N110
BA

The needed air gap is:
2
pe
4
P
NA
6.08 10 m
L
 

And the secondary winding turn number is:
p
s
N
N36
n

6. MOSFET
The maximum drain voltage is:
DSmax
PKmax
R
V=V
V
ΔV=685V

The maximum RMS MOSFET current is:
Qrms_max
RMSp
I
=I
=0.53 A
And the pulse-drain current is:
Q_pulse
PKp
I>I
=1.51A
The FQPF8N80C (800V/8A) meets the power
requirement of the design.
7. Secondary Diode
The maximum RMS current of the output diode is:
Drms_max
RMSs
I
=I
=1.03A
And the maximum reverse voltage is:
PKmax
Dmax
OUT
V
V=
V
194V
n

UF3004 (400V/3A) meets the design criteria.
8. Output Capacitor
The output capacitor is selected only based on
output voltage ripple
OUT
V
OUT
3
LV
O
I
F4(K )
1
C=
K
38 F
2 π fF2(K ) ΔV


Where K3=0.85.
The cap (47μF/100V) is selected as the bus
capacitor.
9. Sense Resistor
Assuming a peak value of 2.5V (@VAC_max=265V)
on the multiplier input, the peak value at the
minimum
line
voltage
is
VMULTpkmin=2.5 ×
85/265=0.8V which is multiplied by the maximum
slope of the multiplier, 1.62, giving a 1.32V peak
on the current sense. So the sense resistor will
not exceed:
sen
PKp
1.32
R0.87
I

Considering the power consumption, select a
0.4Ω sense resistor.
The first stage of flyback PFC design is complete.
Our evaluation board adds two channels of
DC/DC using the MP4689 to constitute a system
for the LED driver. For MP4689 applications,
please find MP4689 datasheet for details.
Figure 8 shows the application schematic with
power stage design. The typical performance and
circuit waveforms are shown in the typical
performance characteristics section. For more
possible applications of this device, please refer
to related Evaluation Board Datasheets.



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