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AM79C90PC Datasheet(PDF) 38 Page - Advanced Micro Devices

Part # AM79C90PC
Description  CMOS Local Area Network Controller for Ethernet (C-LANCE)
PDF  62 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C90PC Datasheet(HTML) 38 Page - Advanced Micro Devices

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AMD
P R E L I M I N A R Y
38
Am79C90
SWITCHING CHARACTERISTICS
Parameter
Test
No.
Symbol
Parameter Description
Conditions
Min
Typ
Max
Unit
1
tTCT
TCLK Period
99
101
ns
2
tTCL
TCLK LOW Time
45
55
ns
3
tTCH
TCLK HIGH Time
45
55
ns
4
tTCR
Rise Time of TCLK
(Note 3)
8
ns
5
tTCF
Fall Time of TCLK
(Note 3)
8
ns
6
tTEP
TENA Propagation Delay After the
60
ns
Rising Edge of TCLK
7
tTEH
TENA Hold Time After the Rising
5
ns
Edge of TCLK
8
tTDP
TX Data Propagation Delay After the
60
ns
Rising Edge of TCLK
9
tTDH
TX Data Hold Time After the Rising
5
ns
Edge of TCLK
10
tRCT
RCLK Period
(Note 3)
85
118
ns
11
tRCH
RCLK HIGH Time
(Note 2)
38
ns
12
tRCL
RCLK LOW Time
(Note 2)
38
ns
13
tRCR
Rise Time of RCLK
(Note 3)
8
ns
14
tRCF
Fall Time of RCLK
(Note 3)
8
ns
15
tRDR
RX Data Rise Time
(Note 3)
8
ns
16
tRDF
RX Data Fall Time
(Note 3)
8
ns
17
tRDH
RX Data Hold Time (RCLK to RX
(Note 2)
5
ns
Data Change)
18
tRDS
RX Data Setup Time (RX Data Stable
(Note 2)
35
ns
to the Rising Edge of RCLK)
19
tDPL
RENA LOW Time
1tTCT + 20
ns
20
tCPH
CLSN HIGH Time
80
ns
21
tDOFF
Bus Master Driver Disable After Rising
50
ns
Edge of
HOLD
22
tDON
Bus Master Driver Enable After Falling
50
2tTCT + 50
ns
Edge of
HLDA
23
tHHA
Delay to Falling Edge of
HLDA from
0
ns
Falling Edge of
HOLD (Bus Master)
24
tRW
RESET Pulse Width LOW
(Note 7)
2tTCT
ns
25
tCYCLE
Read/Write, Address/Data Cycle Time
(Note 1)
6tTCT
ns
26
tXAS
Address Setup Time to the Falling
75
ns
Edge of ALE
27
tXAH
Address Hold Time After the Rising
35
ns
Edge of
DAS
28
tAS
Address Setup Time to the Falling
75
ns
Edge of ALE
29
tAH
Address Hold Time After the Falling
35
ns
Edge of ALE
30
tRDAS
Data Setup Time to the Rising Edge
40
ns
of
DAS (Bus Master Read)



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