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AM79C989JC Datasheet(PDF) 24 Page - Advanced Micro Devices

Part # AM79C989JC
Description  Quad Ethernet Switching Transceiver (QuEST??
PDF  37 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C989JC Datasheet(HTML) 24 Page - Advanced Micro Devices

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24
Am79C989
PRELIMINARY
Interrupt Status and Enable Register (Reg 16)
Interrupt Status and Enable Register (Reg 16) contains
Read/Write (R/W), Read/Only (R/O), or Cleared on
Read (COR) bits. This register is shared across all
ports.
Table 16.
Interrupt Status and Enable Register (Reg 16)
Bit(s)
Name
Description
Read/
Write
Default/
Reset
15:13
Reserved
Written and read as zero.
R/O
0
12
Link Status Change
Interrupt Enable
1 = Link Status Change Interrupt drives the QINT pin;
0 = The Interrupt is masked.
R/W
0
11
Duplex Change
Interrupt Enable
1 = Duplex Change Interrupt drives the QINT pin;
0 = The Interrupt is masked.
R/W
0
10
Auto-Negotiation
Change
Interrupt Enable
1 = Auto-Negotiation Change Interrupt drives the QINT pin (i.e.,
new page received);
0 = The Interrupt is masked.
R/W
0
9
MAU Error
Interrupt Enable
1 = MAU Error Interrupt drives the QINT pin;
0 = The Interrupt is masked.
R/W
0
8
Global
Interrupt Enable
1 = Any Interrupt drives the QINT pin;
0 = The Interrupt is masked.
R/W
0
7:5
Reserved
Written and read as zero.
R/O
0
4
Link Status Change
Interrupt
1 = Link Status changed on one of the 4 ports;
0 = No change in Link Status.
Register bit is cleared on Read.
R/O, COR
0
3
Duplex Change
Interrupt
1 = Duplex mode changed on one of the 4 ports;
0 = Indicates no change in Duplex mode.
Register bit is cleared on Read.
R/O, COR
0
2
Auto-Negotiation
Change
Interrupt
1= Auto-Negotiation status has changed on one of the 4 ports;
0 = Indicates no change.
Register bit is Cleared on Read.
R/O, COR
0
1
MAU Error
Interrupt
1 = A MAU error has occurred on one of the 4 ports; set on any
error bit in the Status Register (Reg 19) for any port;
0 = Indicates no MAU errors have occurred.
Register bit is cleared on Read.
R/O, COR
0
0
Global
Interrupt
1 = Change in status of any of the above interrupts;
0 = No Interrupt condition.
Register bit is Cleared on Read.
R/O, COR
0



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