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AS1119

Datasheet - Detailed Descr i pti on

acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the

data line HIGH to enable the master to generate the STOP condition.

- Figure 15 on page 10 details how data transfer is accomplished on the I²C bus. Depending upon the state of the

R/W bit, two types of data transfer are possible:

- Master Transmitter to Slave Receiver. The first byte transmitted by the master is the slave address, followed by

a number of data bytes. The slave returns an acknowledge bit after the slave address and each received byte.

- Slave Transmitter to Master Receiver. The first byte, the slave address, is transmitted by the master. The slave

then returns an acknowledge bit. Next, a number of data bytes are transmitted by the slave to the master. The

master returns an acknowledge bit after all received bytes other than the last byte. At the end of the last received

byte, a not-acknowledge is returned. The master device generates all of the serial clock pulses and the START

and STOP conditions. A transfer is ended with a STOP condition or a repeated START condition. Since a

repeated START condition is also the beginning of the next serial transfer, the bus will not be released.

The AS1119 can operate in the following slave modes:

- Slave Receiver Mode. Serial data and clock are received through SDA and SCL. After each byte is received, an

acknowledge bit is transmitted. START and STOP conditions are recognized as the beginning and end of a serial

transfer. Address recognition is performed by hardware after reception of the slave address and direction bit.

- Slave Transmitter Mode. The first byte (the slave address) is received and handled as in the slave receiver

mode. However, in this mode the direction bit will indicate that the transfer direction is reversed. Serial data is

transmitted on SDA by the AS1119 while the serial clock is input on SCL. START and STOP conditions are recog-

nized as the beginning and end of a serial transfer.

I²C Device Address Byte

The address byte (see Figure 16) is the first byte received following the START condition from the master device.

Figure 16. I²C Device Address Byte

GND. A maximum of four devices with the same pre-set code can therefore be connected on the same bus at

one time.

- The last bit of the address byte (R/W) define the operation to be performed. When set to a 1 a read operation is

selected; when set to a 0 a write operation is selected.

Following the START condition, the AS1119 monitors the I²C bus, checking the device type identifier being transmitted. Upon receiving the

address code, and the R/W bit, the slave device outputs an acknowledge signal on the SDA line.

Command Byte

The AS1119 operation, (see Table 15 on page 21) is determined by a command byte (see Table 17).

Figure 17. Command Byte

0

1

1

1

0

AD1

AD0

R/W

MSB

65

432

1

LSB

address:

A7

A6

A5

A4

A3

A2

A1

A0

MSB

65

432

1

LSB