PIN

FUNCTION

1

LOA C, LOA DS OA C REGISTER A ND CHA NGES OUTPUT

2

W R, W RITE INPUT, A CTIV A TES A LL CONTROLS

3

CS2, CHIP SELECT INPUT 2

4

CS1, CHIP SELECT INPUT 1

5

M BE, M IDDLE BY TE ENA BLE. D4 TO D7

6

HBE, HIGH BY TE ENA BLE. D8 TO D11

7

LBE, LOW BY TE ENA BLE. D0 TO D3

8

GND, GROUND, A NA LOG A ND DIGITA L GROUND CONNECTED INTERNA LLY

9

V EE, – 15V SUPPLY

10 N.C.

11 V OUT DAC VOLTAGE OUTPUT

12 SUM JCT. SUM M ING JUNCTION OF OUTPUT OPA M P

13 BIPOLA R. CONNECTED TO SUM JCT FOR BIPOLA R OUTPUT RA NGE

14 GA IN. INPUT TO A DJUST FULL SCA LE OUTPUT V OLTA GE

15 V EE, -15V SUPPLY

16 D11, DA TA INPUT, W EIGHT 2-1. M SB

17 D10, DA TA INPUT, W EIGHT 2-2

18 09, DA TA INPUT, W EIGHT 2-3

19 08, DA TA INPUT, W EIGHT 2-4

20 D7, DA TA INPUT, W EIGHT 2-5

21 D6, DA TA INPUT, W EIGHT 2-6

22 D5, DA TA INPUT, W EIGHT 2-7

23 D4, DA TA INPUT, W EIGHT 2-8

24 D3, DA TA INPUT, W EIGHT 2-9

25 D2, DA TA INPUT, W EIGHT 2-10

26 D1, DA TA INPUT, W EIGHT 2-11

27 D0, DA TA INPUT, W EIGHT 2-12, LSB

28 V DD, +5V SUPPLY, CONTROL LOGIC

0.705

(17.907)

M A X

0.255

(6.477) M A X

0.600

(15.240)

0.120

(3.048)

PIN 1 DOT

0.17

(4.321)

DIM ENSIONS

inches

(mm)

TY P

1.540

(43.911)

M A X

0.100

(2.540)

TY P

0.01

(0.254)

0.020

(0.508)

x

BOTTOM

V IEW

28

1

15

14

PA CK A GE OUTLINE

PIN

DIA GRA M

ORDERING INFORM A TION

M ODEL

DESCRIPTION

HS 9338-2

µP DA C, 0.01% Linearity

HS 9338-

µP DA C, 0.05% Linearity

SPECIFICA TION (Continued)

M ECHA NICA L

Case Style

Ceramic

NOTES: 1. Control inputs are TTL and 5V CM OS only, data inputs are fully CM OS and TTL compatible. 2. See A PPLICA TION NOTES for adjustment

procedures. 3 Specified as “ Best Straight Line” . 4. Operating the unit with the DA C Register transparent may result in output “ glitches” due to

logic skewing with the unit. 5. Digital Input V oltage must not exceed supply voltage or go

below –0.5V .“ 0” 0.8V , 2.4V “ 1” V DD.

* Same as HS 9338-2

CA UTION: ESD (Electro-Static Discharge) sensitive device. Permanent damage may occur when unconnected devices are subjected to high energy

electrostatic fields. Unless otherwise noted, the voltage at any digital input should never exceed the supply voltage by more than 0.5 volts or go

below –0.5 volts.

HS9338