LPC1763 datasheet(18/86 Pages) PHILIPS

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LPC1769_68_67_66_65_64_63

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Product data sheet

Rev. 9.3 — 8 January 2014

18 of 86

NXP Semiconductors

LPC1769/68/67/66/65/64/63

32-bit ARM Cortex-M3 microcontroller

[1]

5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis. This pin is pulled up to a voltage level of 2.3 V to 2.6 V.

[2]

5 V tolerant pad providing digital I/O functions (with TTL levels and hysteresis) and analog input. When configured as a ADC input,

digital section of the pad is disabled and the pin is not 5 V tolerant. This pin is pulled up to a voltage level of 2.3 V to 2.6 V.

[3]

5 V tolerant pad providing digital I/O with TTL levels and hysteresis and analog output function. When configured as the DAC output,

digital section of the pad is disabled. This pin is pulled up to a voltage level of 2.3 V to 2.6 V.

[4]

Open-drain 5 V tolerant digital I/O pad, compatible with I2C-bus 400 kHz specification. This pad requires an external pull-up to provide

output functionality. When power is switched off, this pin connected to the I2C-bus is floating and does not disturb the I2C lines.

Open-drain configuration applies to all functions on this pin.

[5]

Pad provides digital I/O and USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and

Low-speed mode only). This pad is not 5 V tolerant.

[6]

5 V tolerant pad with 10 ns glitch filter providing digital I/O functions with TTL levels and hysteresis. This pin is pulled up to a voltage

level of 2.3 V to 2.6 V.

[7]

5 V tolerant pad with TTL levels and hysteresis. Internal pull-up and pull-down resistors disabled.

XTAL2

[10][11]

Output from the oscillator amplifier.

RTCX1

[10][11]

Input to the RTC oscillator circuit.

RTCX2

[10]

Output from the RTC oscillator circuit.

VSS

31,

41,

55,

72,

83,

B3,

B7,

C9,

G7,

J6,

[10]

ground: 0 V reference.

VSSA

[10]

analog ground: 0 V reference. This should nominally be the same voltage

as VSS, but should be isolated to minimize noise and error.

VDD(3V3)

28,

54,

71,

K2,

H9,

C10

, A3

[10]

3.3 V supply voltage: This is the power supply voltage for the I/O ports.

VDD(REG)(3V3)

42,

H6,

[10]

3.3 V voltage regulator supply voltage: This is the supply voltage for the

on-chip voltage regulator only.

VDDA

[10]

analog 3.3 V pad supply voltage: This should be nominally the same

voltage as VDD(3V3) but should be isolated to minimize noise and error. This

voltage is used to power the ADC and DAC. This pin should be tied to 3.3

V if the ADC and DAC are not used.

VREFP

[10]

ADC positive reference voltage: This should be nominally the same

voltage as VDDA but should be isolated to minimize noise and error. Level

on this pin is used as a reference for ADC and DAC. This pin should be tied

to 3.3 V if the ADC and DAC are not used.

VREFN

ADC negative reference voltage: This should be nominally the same

voltage as VSS but should be isolated to minimize noise and error. Level on

this pin is used as a reference for ADC and DAC.

VBAT

[10][12]

RTC pin power supply: 3.3 V on this pin supplies the power to the RTC

peripheral.

n.c.

D4,

not connected.

Table 5.

Pin description …continued

Symbol

Pin/ball

Type

Description

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