OPA2835IDGS datasheet(31/53 Pages) NSC

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OPA 835

Signal and bias to

next stage

Signal and bias

from previous stage

5 V

2.5 V

5 V

VOUT

VSIG

GVSIG

2.5 V

OPA 835

VOUT

Signal and bias to

next stage

Signal and bias

from previous stage

VSIG

GVSIG

5 V

2.5 V

REF

2.5 V

OPA835

OPA2835

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SLOS713E – JANUARY 2011 – REVISED JULY 2013

Figure 65. Inverting Single Supply with Reference

Figure 66 shows a similar inverting single supply scenario with the reference generator replaced by the Thevenin

equivalent using resistors and the positive supply. R1 and R2 form a resistor divider from the 5V supply and are

used to bias the positive side. To cancel the voltage offset that would otherwise be caused by the input bias

currents, set the parallel sum of R1 and R2 equal to the parallel sum of RF and RG. C should be added to limit

coupling of noise into the positive input. For example if gain of –2 is required and RF = 2 kΩ, select RG = 1 kΩ to

set the gain. R1 = R2 = 1.33 kΩ for mid supply voltage bias and for op amp input bias current cancellation. A

good value for C is 0.1µF. This can be lower cost, but note the extra current draw required in the resistor divider.

Figure 66. Inverting Single Supply with Resistors

Pulse Application with Single-Supply

For pulsed applications, where the signal is at ground and pulses to some positive or negative voltage, the circuit

bias voltage considerations are different than with a signal that swings symmetrical about a reference point and

the circuit configuration should be adjusted accordingly. Figure 67 shows a pulsed situation where the signal is at

ground (0 V) and pulses to a positive value.

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