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OPA2835IDGS Datasheet(PDF) 7 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part # OPA2835IDGS
Description  Ultra Low-Power, Rail-to-Rail Out, Negative Rail In, VFB Op Amp
PDF  53 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

OPA2835IDGS Datasheet(HTML) 7 Page - National Semiconductor (TI)

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OPA835
OPA2835
www.ti.com
SLOS713E – JANUARY 2011 – REVISED JULY 2013
SPECIFICATIONS: VS = 5 V
Test conditions unless otherwise noted: VS+ = +5 V, VS– = 0 V, VO = 2 VPP, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, Input and Output
Referenced to mid-supply. TA = 25°C. Unless otherwise noted.
TEST
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
LEVEL(1)
DC PERFORMANCE
Open-loop voltage gain (AOL)
100
120
dB
A
TA = 25°C
±100
±500
A
TA = 0°C to 70°C
±880
Input referred offset voltage
µV
TA = –40°C to 85°C
±1040
B
TA = –40°C to 125°C
±1850
Input offset voltage drift(2)
TA = 0°C to 70°C
±1.4
±8.5
TA = –40°C to 85°C
±1.5
±9
µV/°C
B
TA = –40°C to 125°C
±2.25
±13.5
TA = 25°C
50
200
400
A
TA = 0°C to 70°C
47
410
Input bias current
nA
TA = –40°C to 85°C
45
425
B
TA = –40°C to 125°C
45
530
TA = 0°C to 70°C
±0.25
±1.4
Input bias current drift(2)
TA = –40°C to 85°C
±0.175
±1.05
nA/°C
B
TA = –40°C to 125°C
±0.185
±1.1
TA = 25°C
±13
±100
A
TA = 0°C to 70°C
±13
±100
Input offset current
nA
TA = –40°C to 85°C
±13
±100
B
TA = –40°C to 125°C
±13
±100
TA = 0°C to 70°C
±0.205
±1.23
Input offset current drift(2)
TA = –40°C to 85°C
±0.155
±0.94
nA/°C
B
TA = –40°C to 125°C
±0.155
±0.94
INPUT
TA = 25°C, <3dB degradation in CMRR limit
–0.2
0
V
A
Common-mode input range low
TA = –40°C to 125°C, <3dB degradation in CMRR limit
–0.2
0
V
B
TA = 25°C, <3dB degradation in CMRR limit
3.8
3.9
V
A
Common-mode input range high
TA = –40°C to 125°C, <3dB degradation in CMRR limit
3.8
3.9
V
B
Common-mode rejection ratio
91
113
dB
A
Input impedance common mode
200||1.2
k
Ω || pF
C
Input impedance differential mode
200||1
k
Ω || pF
C
OUTPUT
TA = 25°C, G = 5
0.15
0.2
V
A
Linear output voltage low
TA = –40°C to 125°C, G = 5
0.15
0.2
V
B
TA = 25°C, G = 5
4.75
4.8
V
A
Linear output voltage high
TA = –40°C to 125°C, G = 5
4.75
4.8
V
B
Output saturation voltage, High / Low
TA = 25°C, G = 5
70/25
mV
C
TA = 25°C
±30
±40
mA
A
Linear output current drive
TA = –40°C to 125°C
±25
mA
B
(1)
Test levels (all values set by characterization and simulation): (A) 100% tested at 25°C; over temperature limits by characterization and
simulation. (B) Not tested in production; limits set by characterization and simulation. (C) Typical value only for information.
(2)
Input Offset Voltage Drift, Input Bias Current Drift, and Input Offset Current Drift are average values calculated by taking data at the end
points, computing the difference, and dividing by the temperature range.
Copyright © 2011–2013, Texas Instruments Incorporated
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Product Folder Links: OPA835 OPA2835



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