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Spread Aware™, Zero Delay Buffer
W163
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
February 21, 2000, rev. *A
Features
• Spread Aware™—designed to work with SSFTG
reference signals
• Outputs may be three-stated
• Available in 8-pin SOIC package
• Extra strength output drive available (-15 version)
• Internal feedback maximized the number of outputs
available in 8-pin package
Key Specifications
Operating Voltage: ................................................ 3.3V±10%
Operating Range: ................................ 10 < fOUT < 133 MHz
Cycle-to-Cycle Jitter: .................................................. 200 ps
Output-to-Output Skew: .............................................. 250 ps
Device-to-Device Skew:............................................... 700 ps
Propagation Delay: ...................................................... 350 ps
Spread Aware is a trademark of Cypress Semiconductor Corporation.
Block Diagram
Pin Configuration
Q0
PLL
REF
Q1
Q2
Q3
QFB
QFB
VDD
8
7
6
5
REF
Q0
Q1
GND
1
2
3
4
Q3
Q2
SOIC
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