DS1243 datasheet(2/13 Pages) DALLAS

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DS1243Y

2 of 13

The Phantom Clock provides timekeeping information including hundredths of seconds, seconds,

minutes, hours, day, date, month, and year information. The date at the end of the month is automatically

adjusted for months with less than 31 days, including correction for leap years. The Phantom Clock

operates in either 24–hour or 12–hour format with an AM/PM indicator.

RAM READ MODE

The DS1243Y executes a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip

Enable) is active (low). The unique address specified by the 13 address inputs (A0–A12) defines which of

the 8192 bytes of data is to be accessed. Valid data will be available to the eight data output drivers

within tACC (Access Time) after the last address input signal is stable, providing that CE and OE (Output

Enable) access times and states are also satisfied. If OE and CE access times are not satisfied, then data

access must be measured from the later occurring signal ( CE or OE ) and the limiting parameter is either

tCO for CE or tOE for OE rather than address access.

RAM WRITE MODE

The DS1243Y is in the write mode whenever the WE and CE signals are in the active (low) state after

address inputs are stable. The latter occurring falling edge of CE or WE will determine the start of the

write cycle. The write cycle is terminated by the earlier rising edge of CE or WE . All address inputs must

be kept valid throughout the write cycle. WE must return to the high state for a minimum recovery time

(tWR) before another cycle can be initiated. The OE control signal should be kept inactive (high) during

write cycles to avoid bus contention. However, if the output bus has been enabled ( CE and OE active)

then WE will disable the outputs in t ODW from its falling edge.

DATA RETENTION MODE

The DS1243Y provides full functional capability for VCC greater than VTP and write protects by 4.25

volts. Data is maintained in the absence of VCC without any additional support circuitry. The nonvolatile

static RAM constantly monitors VCC. Should the supply voltage decay, the RAM automatically write

protects itself. All inputs to the RAM become “don’t care” and all outputs are high impedance. As VCC

falls below approximately 3.0 volts, the power switching circuit connects the lithium energy source to

RAM to retain data. During power–up, when VCC rises above approximately 3.0 volts, the power

switching circuit connects external VCC to the RAM and disconnects the lithium energy source. Normal

RAM operation can resume after VCC exceeds 4.5 volts.

FRESHNESS SEAL

Each DS1243Y is shipped from Dallas Semiconductor with its lithium energy source disconnected,

insuring full energy capacity. When VCC is first applied at a level greater than VTP, the lithium energy

source is enabled for battery backup operation.

PHANTOM CLOCK OPERATION

Communication with the Phantom Clock is established by pattern recognition on a serial bit stream of 64

bits which must be matched by executing 64 consecutive write cycles containing the proper data on DQ0.

All accesses which occur prior to recognition of the 64–bit pattern are directed to memory.

After recognition is established, the next 64 read or write cycles either extract or update data in the

Phantom Clock, and memory access is inhibited.

DS1243 Datasheet(PDF) 2 Page - Dallas Semiconductor