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Data transfer to and from the timekeeping function is accomplished with a serial bit stream under control

moving a pointer to the first bit of the 64–bit comparison register. Next, 64 consecutive write cycles are

access to the Phantom Clock.

Therefore, any address to the memory in the socket is acceptable.

However, the write cycles generated to gain access to the Phantom Clock are also writing data to a

location in the mated RAM. The preferred way to manage this requirement is to set aside just one address

location in RAM as a Phantom Clock scratch pad. When the first write cycle is executed, it is compared

to bit 0 of the 64–bit comparison register. If a match is found, the pointer increments to the next location

of the comparison register and awaits the next write cycle. If a match is not found, the pointer does not

advance and all subsequent write cycles are ignored. If a read cycle occurs at any time during pattern

recognition, the present sequence is aborted and the comparison register pointer is reset. Pattern

recognition continues for a total of 64 write cycles as described above until all the bits in the comparison

register have been matched (this bit pattern is shown in Figure 1). With a correct match for 64 bits, the

Phantom Clock is enabled and data transfer to or from the timekeeping registers can proceed. The next 64

cycles will cause the Phantom Clock to either receive or transmit data on DQ0, depending on the level of

CE

cycles without interrupting the pattern recognition sequence or data transfer sequence to the Phantom

Clock.

PHANTOM CLOCK

REGISTER INFORMATION

The Phantom Clock information is contained in 8 registers of 8 bits, each of which is sequentially

accessed 1 bit at a time after the 64–bit pattern recognition sequence has been completed. When updating

the Phantom Clock registers, each register must be handled in groups of 8 bits. Writing and reading

individual bits within a register could produce erroneous results. These read/write registers are defined in

Figure 2.

Data contained in the Phantom Clock register is in binary coded decimal format (BCD). Reading and

writing the registers is always accomplished by stepping through all 8 registers, starting with bit 0 of

register 0 and ending with bit 7 of register 7.