DS1801 datasheet(3/10 Pages) DALLAS

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DS1801

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3-WIRE SERIAL INTERFACE CONTROL

Communication and control of the DS1801 is accomplished through a 3-wire serial port interface that

drives an internal control logic unit. The 3-wire serial interface is designed for microprocessor or

microcontroller applications. The interface consists of three input signals which include RST , CLK and

The RST control signal is used to enable 3-wire serial port write operations. The CLK terminal is a clock

signal input that provides synchronization for data I/O while the D signal input serves to transfer

potentiometer wiper position settings to the device.

As shown in Figure 3, a 3-wire serial port operation begins with a transition of the RST signal input to a

high state. Once the 3-wire port has been activated, data is clocked into the part on the low to high

transition of the CLK signal input. Data input via the D line is transferred in the order of the desired

potentiometer-0 value followed by the potentiometer-1 value.

The DS1801 contains two 65-position potentiometers whose wiper positions are set by an 8-bit value.

These two 8-bit values are written to the 16-bit I/O shift register which is used to store wiper position

during powered conditions. Because the potentiometer has 65-positions, only 7 bits of data are needed to

set wiper position. A detailed diagram of the 16-bit I/O shift register is shown in Figure 2. Bits 0 through

7 are reserved for the potentiometer-0 control while bits 8 through 15 are reserved for control of

potentiometer-1.

Bits 0 through 5 are used for actual wiper positioning of potentiometer-0. Bit 6 is used to mute

potentiometer-0. If this bit has value 1, the potentiometer-0 wiper will be connected to the low end of the

resistive array the mute position. The value of bit 7 is a “don’t care” and will not affect operation of the

DS1801 or potentiometer-0.

Bits 8 through 13 are used for wiper positioning of potentiometer-1. Bit 14 is used for muting of the

potentiometer-1 wiper output. Bit 15, like bit 7, is a “don’t care” and will not affect operation of the

DS1801.

Data for the DS1801 is transmitted LSB first starting with bit 0. A complete transmission of 16 bits of

data is required to insure proper setting of each potentiometer’s wiper. An incomplete transmission may

result in undesired wiper settings.

Once the complete 16 bits of information has been transmitted and the RST signal input transitions to a

low state, the new wiper positions are loaded into the part.

16-BIT I/O SHIFT REGISTER Figure 2

DS1801 Datasheet(PDF) 3 Page - Dallas Semiconductor