DS87C520 datasheet(26/45 Pages) DALLAS

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DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers

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Table 9. EPROM Programming Modes

MODE

RST

PSEN

ALE/

PROG

EA/VPP

P2.6

P2.7

P3.3

P3.6

P3.7

Program Code Data

12.75V

Verify Code Data

Program Encryption Array

Address 0-3Fh

12.75V

LB1

12.75V

LB2

12.75V

Program Lock Bits

LB3

12.75V

Program Option Register

Address FCh

12.75V

Read Signature or Option

Registers 30, 31, 60 FCh

Table 10. DS87C520 EPROM Lock Bits

LOCK BITS

LEVEL

LB1

LB2

LB3

PROTECTION

No program lock. Encrypted verify if encryption table was

programmed.

Prevent MOVC instructions in external memory from reading

program bytes in internal memory.

EA is sampled and latched on

reset. Allow no further programming of EPROM.

Level 2 plus no verify operation. Also, prevent MOVX

instructions in external memory from reading SRAM (MOVX) in

internal memory.

Level 3 plus no external execution.

SECURITY OPTIONS

The DS87C520 employs a standard three-level lock that restricts viewing of the EPROM contents. A 64-

byte Encryption Array allows the authorized user to verify memory by presenting the data in encrypted

form.

Lock Bits

The security lock consists of three lock bits. These bits select a total of four levels of security. Higher

levels provide increasing security but also limit application flexibility. Table 10 shows the security

settings. Note that the programmer cannot directly read the state of the security lock. User software has

access to this information as described in the Memory section.

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