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EM73P461 Datasheet(PDF) 36 Page - ELAN Microelectronics Corp |
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EM73P461 Datasheet(HTML) 36 Page - ELAN Microelectronics Corp |
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36 / 38 page ![]() 36 * This specification are subject to be changed without notice. EM73P461A EM73P461A EM73P461A EM73P461A EM73P461A 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT 12.27.2001 Preliminary Preliminary Preliminary Preliminary Preliminary (10) Input/output (10) Input/output (10) Input/output (10) Input/output (10) Input/output Mnemonic Object code (binary) Mnemonic Object code (binary) Mnemonic Object code (binary) Mnemonic Object code (binary) Mnemonic Object code (binary) Operation description Operation description Operation description Operation description Operation description Byte Byte Byte Byte Byte Cycle Cycle Cycle Cycle Cycle Flag Flag Flag Flag Flag C C C C C Z Z Z Z Z S S S S S INA p 0110 1111 0100 pppp Acc ←PORT[p] 2 2 - Z Z' INM p 0110 1111 1100 pppp RAM[HL] ←PORT[p] 2 2 - - Z' OUT #k,p 0100 1010 kkkk pppp PORT[p] ←k2 2 - - 1 OUTA p 0110 1111 000p pppp PORT[p] ←Acc 2 2 - - 1 OUTM p 0110 1111 100p pppp PORT[p] ←RAM[HL] 2 2 - - 1 (11) Flag manipulation (11) Flag manipulation (11) Flag manipulation (11) Flag manipulation (11) Flag manipulation Mnemonic Object code (binary) Mnemonic Object code (binary) Mnemonic Object code (binary) Mnemonic Object code (binary) Mnemonic Object code (binary) Operation description Operation description Operation description Operation description Operation description Byte Byte Byte Byte Byte Cycle Cycle Cycle Cycle Cycle Flag Flag Flag Flag Flag C C C C C Z Z Z Z Z S S S S S @ CGF 0101 0111 GF ←01 1 - - 1 @ SGF 0101 0101 GF ←11 1 - - 1 TFCFC 0101 0011 SF ←CF', CF←01 1 0 - * @ TGS 0101 0100 SF ←GF 1 1 - - * TTCFS 0101 0010 SF ←CF, CF←11 1 1 - * TZS 0101 1011 SF ←ZF 1 1 - - * (12) Interrupt control (12) Interrupt control (12) Interrupt control (12) Interrupt control (12) Interrupt control Mnemonic Object code (binary) Mnemonic Object code (binary) Mnemonic Object code (binary) Mnemonic Object code (binary) Mnemonic Object code (binary) Operation description Operation description Operation description Operation description Operation description Byte Byte Byte Byte Byte Cycle Cycle Cycle Cycle Cycle Flag Flag Flag Flag Flag C C C C C Z Z Z Z Z S S S S S CIL r 0110 0011 11rr rrrr IL ←IL & r 2 2 - - 1 DICIL r 0110 0011 10rr rrrr EIF ←0,IL←IL&r 2 2 - - 1 EICIL r 0110 0011 01rr rrrr EIF ←1,IL←IL&r 2 2 - - 1 EXAE 0111 0101 MASK ↔Acc 1 1 - - 1 RTI 0100 1101 SP ←SP+1,FLAG.PC 1 2 * * * ←STACK[SP],EIF ←1 (13) CPU control (13) CPU control (13) CPU control (13) CPU control (13) CPU control Mnemonic Object code (binary) Mnemonic Object code (binary) Mnemonic Object code (binary) Mnemonic Object code (binary) Mnemonic Object code (binary) Operation description Operation description Operation description Operation description Operation description Byte Byte Byte Byte Byte Cycle Cycle Cycle Cycle Cycle Flag Flag Flag Flag Flag C C C C C Z Z Z Z Z S S S S S NOP 0101 0110 no operation 1 1 - - - @ : just for 4K ROM |
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