ACT8937 datasheet(35/44 Pages) ACTIVE-SEMI

35 / 44 page

ACT8937

Rev 0, 21-Sep-10

- 35 -

www.active-semi.com

ActivePMU

TM and ActivePathTM are trademarks of Active-Semi.

I2CTM is a trademark of NXP.

Innovative PowerTM

Active-Semi Proprietary―For Authorized Recipients and Customers

General Description

REG4, REG5, REG6, and REG7 are low-noise,

low-dropout linear regulators (LDOs) that supply up

150mA,

250mA,

and

250mA,

respectively. Each LDO has been optimized to

achieve low noise and high-PSRR, achieving more

than 65dB PSRR at frequencies up to 10kHz.

Output Current Limit

Each LDO contains current-limit circuitry featuring a

current-limit fold-back function. During normal and

moderate overload conditions, the regulators can

support more than their rated output currents.

During extreme overload conditions, however, the

current limit is reduced by approximately 30%,

reducing power dissipation within the IC.

Compensation

The LDOs are internally compensated and require

very little design effort, simply select input and

output capacitors according to the guidelines below.

Input Capacitor Selection

Each LDO requires a small ceramic input capacitor

to supply current to support fast transients at the

input of the LDO. Bypassing each INL pin to GA

with 1μF. High quality ceramic capacitors such as

X7R and X5R dielectric types are strongly

recommended.

Output Capacitor Selection

Each LDO requires a small ceramic output

capacitor for stability. Capacitance value is 1.5μF

for REG4 and REG5, 2.2μF for REG6 and REG7.

For best performance, each output capacitor should

be connected directly between the output and GA

pins, as close to the output as possible, and with a

short, direct connection. High quality ceramic

capacitors such as X7R and X5R dielectric types

are strongly recommended.

Configuration Options

Output Voltage Programming

By default, each LDO powers up and regulates to

its default output voltage. Once the system is

enabled, each output voltage may be independently

programmed to a different value by writing to the

regulator's VSET[-] register via the I2C serial

interface as shown in Table 8.

Enable / Disable Control

During normal operation, each LDO may be

enabled or disabled via the I2C interface by writing

to that LDO's ON[ ] bit. To enable the LDO set ON[ ]

to 1, to disable the LDO clear ON[ ] to 0.

REG4, REG5, REG6, REG7 Turn-on Delay

Each of REG4, REG5, REG6 and REG7 features a

programmable Turn-on Delay which help ensure a

reliable qualification. This delay is programmed by

DELAY[2:0], as shown in Table 7.

Output Discharge

Each of the ACT8937’s LDOs features an optional

output discharge function, which discharges the

output to ground through a 1.5kΩ resistance when

the LDO is disabled. This feature may be enabled

or disabled by setting DIS[-] via; set DIS[-] to 1 to

enable this function, clear DIS[-] to 0 to disable it.

Low-Power Mode

Each of ACT8937's LDOs features a LOWIQ[-] bit

which, when set to 1, reduces the LDO's quiescent

current by about 16%, saving power and extending

battery lifetime.

OK[ ] and Output Fault Interrupt

Each LDO features a power-OK status bit that can

be read by the system microprocessor via the

interface. If an output voltage is lower than the

power-OK threshold, typically 11% below the

programmed regulation voltage, the value of that

regulator's OK[-] bit will be 0.

If a LDO's nFLTMSK[-] bit is set to 1, the ACT8937

will interrupt the processor if that LDO's output

voltage falls below the power-OK threshold. In this

case, nIRQ will assert low and remain asserted until

the OK[-] bit has been read via I2C.

PCB Layout Considerations

PCB Layout Considerations The ACT8937’s LDOs

provide good DC, AC, and noise performance over

a wide range of operating conditions, and are

relatively insensitive to layout considerations. When

designing a PCB, however, careful layout is

necessary to prevent other circuitry from degrading

LDO performance.

A good design places input and output capacitors

as close to the LDO inputs and output as possible,

and utilizes a star-ground configuration for all

regulators

prevent

noise-coupling

through

ground. Output traces should be routed to avoid

close proximity to noisy nodes, particularly the SW

nodes of the DC/DCs.

REFBP is a filtered reference noise, and internally

LOW-NOISE, LOW-DROPOUT LINEAR REGULATORS

ACT8937 Datasheet(PDF) 35 Page - Active-Semi, Inc

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