LMK04800 datasheet(13/79 Pages) NSC

13 / 79 page

L M K 0 4 8 X X

E V A L U A T I O N

B O A R D

O P E R A T I N G

I N S T R U C T I O N S

Evaluation Board Inputs and Outputs

The following table contains descriptions of the inputs and outputs for the evaluation board.

Unless otherwise noted, the connectors described can be assumed to be populated by default.

Additionally, some applicable CodeLoader programming controls are noted for convenience.

Refer to the LMK04800 Family Datasheet for complete register programming information.

Table 6: Evaluation Board Inputs and Outputs

Connector Name

Signal Type,

Input/Output

Description

Populated:

CLKout0, CLKout0*,

CLKout2, CLKout2*,

CLKout4, CLKout4*,

CLKout6, CLKout6*,

CLKout8, CLKout8*,

CLKout10, CLKout10*

Not Populated:

CLKout1, CLKout1*,

CLKout3, CLKout3*,

CLKout5, CLKout5*,

CLKout7, CLKout7*,

CLKout9, CLKout9*,

CLKout11, CLKout11*

Analog,

Output

Clock outputs with programmable output buffers.

The output terminations by default on the evaluation

board are shown below, and the output type selected by

default in CodeLoader is indicated by an asterisk (*):

Clock output pair

Default Board

Termination

CLKout0

LVPECL*

CLKout1

LVPECL

CLKout2

LVPECL*

CLKout3

LVPECL

CLKout4

LVDS* / LVCMOS

CLKout5

LVDS / LVCMOS

CLKout6

LVDS* / LVCMOS

CLKout7

LVDS / LVCMOS

CLKout8

LVDS* / LVCMOS

CLKout9

LVDS / LVCMOS

CLKout10

LVPECL*

CLKout11

LVPECL

Each CLKout pair has a programmable LVDS,

LVPECL, or LVCMOS buffer. The output buffer type

can be selected in CodeLoader in the Clock Outputs

tab via the CLKoutX_TYPE control.

All clock outputs are AC-coupled to allow safe testing

with RF test equipment.

All LVPECL clock outputs are source-terminated using

240-ohm resistors.

If an output pair is programmed to LVCMOS, each

output can be independently configured (normal,

inverted, or off/tri-state).

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