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TMS320F28062 Datasheet(PDF) 73 Page - Texas Instruments |
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TMS320F28062 Datasheet(HTML) 73 Page - Texas Instruments |
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73 / 175 page ![]() TRST TMS TDI TDO TCK V DDIO MCU EMU0 EMU1 TRST TMS TDI TDO TCK TCK_RET 13 14 2 1 3 7 11 9 6 inches or less PD GND GND GND GND GND 5 4 6 8 10 12 JTAG Header V DDIO TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 www.ti.com SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012 5.7 Emulator Connection Without Signal Buffering for the MCU Figure 5-9 shows the connection between the MCU and JTAG header for a single-processor configuration. If the distance between the JTAG header and the MCU is greater than 6 inches, the emulation signals must be buffered. If the distance is less than 6 inches, buffering is typically not needed. Figure 5-9 shows the simpler, no-buffering situation. For the pullup and pulldown resistor values, see Section 2.4, Signal Descriptions. A. See Figure 5-48 for JTAG/GPIO multiplexing. Figure 5-9. Emulator Connection Without Signal Buffering for the MCU NOTE The 2806x devices do not have EMU0/EMU1 pins. For designs that have a JTAG Header on-board, the EMU0/EMU1 pins on the header must be tied to VDDIO through a 4.7-kΩ (typical) resistor. Copyright © 2010–2012, Texas Instruments Incorporated Peripheral and Electrical Specifications 73 Submit Documentation Feedback Product Folder Links: TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 |
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