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MB88346LPFV Datasheet(PDF) 5 Page - fujitsu semiconductor |
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MB88346LPFV Datasheet(HTML) 5 Page - fujitsu semiconductor |
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5 / 17 page ![]() MB88346L 5 ■ DATA CONFIGURATION The MB88346L has a 12-bit shift register for controlling the chip. The data passed to the 12-bit shift register needs to be supplied in the following format. The data structure consists of a total of 12 bits, four for address selection and eight for D/A data output. 1. Shift Register Control Data Configuration 2. D/A Converter Control Signals VLB = (VDD − VSS) /255 D0 D1 D2 D3 D4 D5 D6 D7 D/A data output 00000000 := VSS 10000000 := VLB + VSS 01000000 := VLB × 2 + VSS • • • • • • • • • • • • • • • • • • • • • • • • • • • 01111111 := VLB × 254 + VSS 11111111 := VDD Last LSB D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 First MSB Address selection D/A data output |
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