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MAX11270 Datasheet(PDF) 13 Page - Maxim Integrated Products

Part # MAX11270
Description  Integrated PGA
PDF  46 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX11270 Datasheet(HTML) 13 Page - Maxim Integrated Products

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PIN
NAME
FUNCTION
1
DIN
Serial Data Input. Data is clocked into DIN on the rising edge of SCLK. DIN configures the internal
register writes or a command operation.
2
DOUT
Serial Data Output or Real-Time Modulator MB0 Output. DOUT outputs 32 or 24 bits of filtered data in
normal data mode. DOUT transitions on the falling edge of SCLK.
3, 20
DGND
Digital Ground
4
SYNC
SYNC Reset. SYNC resets both the digital filter and the modulator.
Connect SYNC from multiple MAX11270s in parallel to synchronize more than one ADC to an external
trigger. This is a digital input pin and is not internally pulled down. For normal operation drive or pull this
pin low.
5
RSTB
The RSTB function is a complete reset of all digital functions resulting in a power-on reset default state.
This is a digital input pin and is not internally pulled up. For normal operation drive or pull this pin high.
6
GPIO3
General-Purpose I/O 3 or Modulator Sync Output. GPIO3 is configurable as a digital input or output.
GPIO pins have weak pull ups and do not require external bias if unused. For lowest power operation
do not connect or drive high with GPIO configured as input (default).
7
GPIO2
General-Purpose I/O 2. Register controllable via SPI. GPIO pins have weak pull ups and do not require
external bias if unused. For lowest power operation do not connect or drive high with GPIO configured
as input (default).
8
GPIO1
General-Purpose I/O 1. Register controllable via SPI. GPIO pins have weak pull ups and do not require
external bias if unused. For lowest power operation do not connect or drive high with GPIO configured
as input (default).
24
23
22
21
20
19
18
1
2
3
4
5
6
7
SCLK
CSB
DVDD
CAPREG
SYNC
DGND
DOUT
DIN
TOP VIEW
MAX11270
DGND
CLK
RDYB
GPIO2
GPIO3
17
8
AVSS
GPIO1
16
9
CAPP
AVDD
15
10
CAPN
AVSS
14
11
REFP
AINN
13
12
REFN
AINP
RSTB
TSSOP
+
MAX11270
24-Bit, 10mW, 130dB SNR, 64ksps Delta-Sigma
ADC with Integrated PGA
www.maximintegrated.com
Maxim Integrated │ 13
Pin Configuration
Pin Description



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