MAX77342 datasheet(21/50 Pages) MAXIM

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MAX77342

1.6A Adaptive DC-DC Step-Up Converter

with High-Side Flash Driver

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Adaptive Output Voltage Regulation

The adaptive regulation scheme for the device is achieved

using a digital regulation control loop. The output voltage

is controlled using an internal 8-bit DAC with a 2.6V to

5.3V range and a step size of VADP_SS (10mV). The

effective output voltage range is limited by minimum duty

cycle for the lower limit and the upper limit is limited by

the OVP_D (5.15V) threshold or the peak current limit of

the converter.

When the converter is initially enabled, the converter first

performs a soft-start cycle. During this time the output of the

converter is charged up to the DCDC_SS threshold. This is

done before the current regulator is enabled to ensure there

is sufficient headroom to operate the current regulator.

Once the soft-start is completed, the current regulator

is enabled. The device samples the voltage headroom

across the current regulator to determine if the output volt-

age should be regulated to a higher threshold.

The adaptive regulation has two different behaviors

depending on if the current regulator is ramping up the

current or if the current has reached the final steady-

state level.

During current ramping up, reducing the output voltage

is not allowed by the adaptive regulation. This is done to

ensure that sufficient headroom is always available for the

current regulator. The voltage across the current regula-

tor is sampled every fADPT_SR (125kHz) and the output

is then adjusted VADP_SS (10mV) up or kept at present

level if sufficient headroom is detected.

During the final steady-state current level, the voltage

across the current regulator is sampled at a lower fre-

quency, every fADPT_SR (62.5kHz) and the output is then

adjusted VADP_SS (10mV) up or down depending on the

current regulator headroom.

If the input current limiter is tripped, the device adaptive

control blocks the output voltage from increasing. This is

an indication that insufficient energy is available and the

output is not within regulation. Therefore, increasing the

output voltage in this case does not result in an actual

increase of output voltage, since the input current is limit-

ing the output voltage.

If the adaptive regulation is trying to regulate the output

voltage to a higher threshold than the OVP_D threshold,

the adaptive control loop limits the output voltage to the

OVP_D threshold. If the output condition is trying to regu-

late the output voltage above the OVP_D threshold for a

duration longer than tOVP_D 1.024ms (typ), this gener-

ates a fault condition meaning that the FLED is open and

disables the DC-DC converter and the FLED driver.

Once the initial ramp up of the current regulator is com-

pleted, the sample rate of the adaptive regulation threshold

fADP_SR is changed from 125kHz to 62.5kHz. This is done

to ensure slow changes on the output, hence reducing EMI

issues. In addition, the output voltage is now allowed to

eitherrampupordownoneLSBdependingonthevoltage

headroom measured across the current regulator. The only

exception for this is during the following conditions:

1) Input current limit active. In this case the output is only

allowed to decrease if sufficient headroom is detected

for the current regulator.

2) Output exceeding overvoltage threshold, OVP_D. In

this case the output is only allowed to decrease if suf-

ficient headroom is detected for the current regulator.

UsingtheI2C register, it is possible to read out the actual

adaptive output voltage regulation threshold. This value is

storedintheDCDC_OUTregister,makingitpossiblefor

the application to determine what the adaptive output volt-

age is within the expected range for the current operation.

This result can be used to determine the condition of the

external LED as well as for fault indication.

During a flash event, the adaptive maximum voltage is

stored in the DCDC_OUT_MAX I2C register. This infor-

mation can be used to determine the actual forward

voltage of the LED as well as the peak voltage condition

during the flash event.

See Figure 4 for a state diagram of the adaptive regula-

tion function.

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