ML9212 datasheet(8/17 Pages) ETC2

8 / 17 page

FEDL9212-01

LAPIS Semiconductor

ML9212

8/17

AC Characteristics

Ta = –40 to +105°C, VDISP = 8.0 to 18.0 V, VDD = 4.5 to 5.5 V

Parameter

Symbol

Condition

Min.

Max.

Unit

Clock Frequency

—

2.0

MHz

Clock Pulse Width

tCW

—

200

—

Data Setup Time

tDS

—

200

—

Data Hold Time

tDH

—

200

—

CS Off Time

tCSL

—

s

CS Setup Time

(CS-Clock)

tCSS

—

200

—

CS Hold Time

(Clock-CS)

tCSH

—

200

—

CS Wait Time

tRSOFF

—

400

—

tR = 20% to 80%

—

2.0

s

Output Slew Rate Time

CL = 100 pF

tF = 80% to 20%

—

2.0

s

VDD Rise Time

tPRZ

Mounted in a unit

—

100

s

VDD Off Time

tPOF

Mounted in a unit, VDD = 0.0 V

5.0

—

TIMING DIAGRAM

Data Input Timing

Reset Timing

Driver Output Timing

CLOCK

DATA IN

tDS

tDH

tCSS

–0.8VDD

–0.2VDD

–0.8VDD

–0.2VDD

–0.8VDD

–0.2VDD

1/fC

tCW

tCSH

tCSL

VALID

VDD

tPOF

tPRZ

tRSOFF

–0.8VDD

–0.0 V

–0.8VDD

–0.0 V

–0.8VDISP

–0.2VDISP

SEG1-32, GRID1-3

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