AT90PWM2 datasheet(162/365 Pages) ATMEL

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162

4317K–AVR–03/2013

AT90PWM2/3/2B/3B

16.24 Interrupts

This section de scribes the specifics of the interr up t handling as performed in

AT90PWM2/2B/3/3B.

16.24.1

List of Interrupt Vector

Each PSC provides 2 interrupt vectors

•

PSCn EC (End of Cycle

): When enabled and when a match with OCRnRB occurs

•

PSCn CAPT (Capture Event)

: When enabled and one of the two following events occurs :

retrigger, capture of the PSC counter or Synchro Error.

16.26.216.26.2See PSCn Interrupt Mask Register page 172 and PSCn Interrupt Flag Register

page 173

16.24.2

PSC Interrupt Vectors in AT90PWM2/2B/3/3B

Table 16-9.

Output Clock versus Selection and Prescaler

PCLKSELn

PPREn1

PPREn0

CLKPSCn output

AT90PWM2/3

CLKPSCn output

AT90PWM2B/3B

CLK I/O

CLK I/O / 4

CLK I/O / 16

CLK I/O / 32

CLK I/O / 64

CLK I/O / 256

0CLK PLL

CLK PLL

CLK PLL / 4

CLK PLL / 16

CLK PLL / 32

CLK PLL / 64

CLK PLL / 256

Table 16-10. PSC Interrupt Vectors

Vector

No.

Program

Address

Source

Interrupt Definition

0x0001

PSC2 CAPT

PSC2 Capture Event or Synchronization Error

0x0002

PSC2 EC

PSC2 End Cycle

0x0003

PSC1 CAPT

PSC1 Capture Event or Synchronization Error

0x0004

PSC1 EC

PSC1 End Cycle

0x0005

PSC0 CAPT

PSC0 Capture Event or Synchronization Error

0x0006

PSC0 EC

PSC0 End Cycle

AT90PWM2 Datasheet(PDF) 162 Page - ATMEL Corporation

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