AT90PWM2 datasheet(190/365 Pages) ATMEL

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4317K–AVR–03/2013

AT90PWM2/3/2B/3B

Figure 18-4. Frame Formats

Start bit, always low.

(n)

Data bits (0 to 8).

Parity bit. Can be odd or even.

Stop bit, always high.

IDLE

No transfers on the communication line (RxD or TxD). An IDLE line must be

high.

The frame format used by the USART is set by the UCSZ2:0, UPM1:0 and USBS bits in UCSRB

and UCSRC. The Receiver and Transmitter use the same setting. Note that changing the setting

of any of these bits will corrupt all ongoing communication for both the Receiver and Transmitter.

The USART Character SiZe (UCSZ2:0) bits select the number of data bits in the frame. The

USART Parity mode (UPM1:0) bits enable and set the type of parity bit. The selection between

one or two stop bits is done by the USART Stop Bit Select (USBS) bit. The Receiver ignores the

second stop bit. An FE (Frame Error) will therefore only be detected in the cases where the first

stop bit is zero.

18.4.2

Parity Bit Calculation

The parity bit is calculated by doing an exclusive-or of all the data bits. If odd parity is used, the

result of the exclusive or is inverted. The relation between the parity bit and data bits is as

follows:

even

Parity bit using even parity

odd

Parity bit using odd parity

Data bit n of the character

If used, the parity bit is located between the last data bit and first stop bit of a serial frame.

18.5

USART Initialization

The USART has to be initialized before any communication can take place.

The configuration between the USART or EUSART mode should be done before any other

configuration.

The initialization process normally consists of setting the baud rate, setting frame format and

enabling the Transmitter or the Receiver depending on the usage.

For interrupt driven USART operation, the Global Interrupt Flag should be cleared (and inter-

rupts globally disabled) when doing the initialization.

Before doing a re-initialization with changed baud rate or frame format, be sure that there are no

ongoing transmissions during the period the registers are changed. The TXC flag can be used to

check that the Transmitter has completed all transfers, and the RXC flag can be used to check

[5]

[6]

[7]

[8]

[P]

Sp1 [Sp2]

(St / IDLE)

(IDLE)

FRAME

even

–



odd





–







AT90PWM2 Datasheet(PDF) 190 Page - ATMEL Corporation

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