HCPL7820 datasheet(9/15 Pages) HP

9 / 15 page

1-241

Figure 3. Input Offset Change vs. VDD1

and VDD2.

Figure 4. Output Voltages vs. Input

Voltage.

VDD – SUPPLY VOLTAGE – V

0.2

0.1

-0.1

4.6

0.5

4.8

5.0

5.2

TA = 25°C

-0.2

0.3

vs. VDD1 (VDD2 = 5 V)

0.4

4.4

5.6

5.4

vs. VDD2 (VDD1 = 5 V)

VIN – INPUT VOLTAGE – V

2.5

2.0

1.5

-0.4

4.0

-0.2

0.2

VDD1 = 5 V

VDD2 = 5 V

TA = 25°C

1.0

3.0

3.5

-0.6

0.6

0.4

POSITIVE

OUTPUT

NEGATIVE

OUTPUT

Figure 5. Gain and Nonlinearity Test Circuit.

Figure 1. Input Offset Voltage Test Circuit.

Figure 2. Input Offset Change vs.

Temperature.

TA – TEMPERATURE – °C

0.3

0.2

-20

0.6

VDD1 = 5 V

VDD2 = 5 V

-0.1

0.4

0.5

-40

100

0.1

040

0.1 µF

VDD2

VOUT

HCPL-7820/7825

0.1 µF

10 K

VDD1

+15 V

0.1 µF

-15 V

–

AD624CD

GAIN = 100

0.47

µF

0.47

µF

0.1 µF

VDD2

HCPL-7820/7825

0.01 µF

10 K

+15 V

0.1 µF

-15 V

–

AD624CD

GAIN = 4

0.47

µF

0.47

µF

VDD1

13.2

404

VIN

VOUT

+15 V

0.1 µF

-15 V

–

AD624CD

GAIN = 10

10 K

0.47

µF

0.1 µF

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