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HCTL2016 Datasheet(PDF) 1 Page - Agilent(Hewlett-Packard) |
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HCTL2016 Datasheet(HTML) 1 Page - Agilent(Hewlett-Packard) |
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1 / 18 page ![]() 2-178 H Quadrature Decoder/Counter Interface ICs Technical Data HCTL-2000 HCTL-2016 HCTL-2020 Features • Interfaces Encoder to Microprocessor • 14 MHz Clock Operation • Full 4X Decode • High Noise Immunity: Schmitt Trigger Inputs Digital Noise Filter • 12 or 16-Bit Binary Up/ Down Counter • Latched Outputs • 8-Bit Tristate Interface • 8, 12, or 16-Bit Operating Modes • Quadrature Decoder Output Signals, Up/Down and Count • Cascade Output Signals, Up/ Down and Count • Substantially Reduced System Software ESD WARNING: Standard CMOS handling precautions should be observed with the HCTL-20XX family ICs. Devices Part Number Description Package Drawing HCTL-2000 12-bit counter. 14 MHz clock operation. A HCTL-2016 All features of the HCTL-2000. 16-bit counter. A HCTL-2020 All features of the HCTL-2016. Quadrature decoder output B signals. Cascade output signals. Description The HCTL-2000, 2016, 2020 are CMOS ICs that perform the quadrature decoder, counter, and bus interface function. The HCTL-20XX family is designed to improve system performance Applications • Interface Quadrature Incremental Encoders to Microprocessors • Interface Digital Potentiom- eters to Digital Data Input Buses 5965-5894E |
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