W185

7

Application Information

Recommended Circuit Configuration

For optimum performance in system applications the power

supply decoupling scheme shown in Figure 4 should be used.

EMI radiation. The 0.1-

µF decoupling capacitor should be

creased trace inductance will negate its decoupling capability.

The 10-

µF decoupling capacitor shown should be a tantalum

made via a ferrite bead, as shown.

Recommended Board Layout

Figure 5 shows a recommended 2-layer board layout.

Document #: 38-00809-A

Figure 4. Recommended Circuit Configuration

24

23

22

21

1

2

3

4

C3

FB

C5

3.3V or 5V System Supply

10 µF Tantalum

0.1 µF

Clock

Reference Input

Output

R

9

20

19

18

17

16

15

14

13

8

7

6

5

12

11

10

R

R

Clock Output

Clock Output

C2

0.1 µF

C4

0.1 µF

R

R

R

C1

0.1 µF

NC

Logic Input

XTAL Connection or NC

Clock Output

Clock Output

Reference Output

Clock Output

R

XTAL Connection or

High frequency supply decoupling

capacitor (0.1-µF recommended).

Common supply low frequency

decoupling capacitor (10-µF tantalum

recommended).

FB

Ferrite Bead

C1....C4 =

C5 =

Match value to line impedance

R =

=

C4

C5

G

FB

=

Via To GND Plane

G

G

(3.3V or 5V)

Power Supply Input

G

Xtal Connection or Reference Input

Xtal Connection or NC

R

G

Clock Output

G

C3

C2

C1

G

G

G

R

R

R

Figure 5. Recommended Board Layout (2-Layer Board)

Ordering Information

Ordering Code

Package

Name

Package Type

W185

W185-5

H

24-Pin SSOP (209-mil)