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GL6965 Datasheet(PDF) 5 Page - Hynix Semiconductor |
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GL6965 Datasheet(HTML) 5 Page - Hynix Semiconductor |
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5 / 23 page ![]() GL6965 5 Pin No. Symbo l Function Explanation 9 MUTE MUTE terminal Switching terminal of transmit signal with MFI input signal in transmitting system. Switching terminal of receiving signal with BTI input signal in receiving system. “L” State—Signal which is input from MFI is output to VL terminal ( pin) Signal which is input from BTI is output to terminals RO1 and RO2. “H” or “ OPEN” state Transmitting input signal is output to VL terminal ( pin). Receiving input signal is output to terminals RO1 and RO2 ( pin, pin) This terminal is pulled up by constant-current circuit 10 GND Ground terminal Connected to negative output of diode bridge circuit. 11 UP DC impedance control terminal When this terminal is connected to GND terminal ( pin) directly or through resistance. DC potential of VL terminal ( pin) can be in-creased up to max. 1.5V (TYP.) in the same line current. This function has no relation to the state of MUTE terminal. 12 PADC Pad control terminal When this terminal is connected to GND terminal ( pin) or CC V terminal ( pin) through resistance, operation cur- rent of gain control (Auto-PAD) performed by line current can be controlled. 13 REF Internal reference voltage Output terminal Voltage of this terminal is used as a reference voltage of in- ternal amplifiers. Never used this terminal for an external power supply. 14 RPI2 Non-inversion input terminal of receiving Input Amp. Apply DC bias to this terminal from REF terminal ( pin) through resistance. 15 RPI1 Inversion Input terminal of receiving input Amp. Receives negative feedback from RPO terminal ( pin). 16 RPO Output terminal of Receiving input Amp. Makes negative feedback to RPI1 terminal ( pin). 17 BTI Dial confirmation sound (Beep Tone, DTMF), monitor sound input terminal Signal which is input to this terminal is output to terminals RO1 and RO2 ( pin and pin) only when MUTE ter- minal ( pin) is in “L” state. Since this terminal is biased to about the same potentialas REF terminal ( pin), avoid direct impressing external DC voltage through capacitor at in-putting external signal 18 RO2 Receiving output terminal Inversion output Output terminal to receiver. Signal of which phase is negative to RO1 terminal ( pin), is output. 19 RO1 Receiving output terminal Non-inversion output Output terminal to receiver, Signal of which phase is negative to RO2 terminal ( pin), is output 20 CC V Internal power supply voltage terminal Power supply of internal amplifiers 1 1 1 19 18 10 10 20 13 16 15 19 18 19 18 9 3 |
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