GMS30C2116 datasheet(13/322 Pages) HYNIX

13 / 322 page

Overview

0-3

0.1. GMS30C2116/32 RISC/DSP (continued)

On-chip Memory:

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4KByte internal (on-chip) memory

Memory Data Types:

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Unsigned and signed byte (8 bit)

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Unsigned and signed half word (16 bit), located on half word boundary

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Undedicated word (32 bit), located on word boundary

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Undedicated double-word (64 bit), located on word boundary

Runtime Stack:

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Runtime stack is divided into memory part and register part

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frame(s)

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Current stack frame (maximum 16 registers) is always kept in register part of the stack

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Data transfer between memory and register part of the stack is automatic

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Upper stack bound is guarded

Instruction Cache:

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An on-chip instruction cache reduces instruction memory access substantially

Instructions General:

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Variable-length instructions of one, two or three half words halve required memory

bandwidth

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Pipeline depth of only two stages, assures immediate refill after branches

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instructions

type

"source operator destination

⇒ destination" or

"source operator immediate

⇒ destination"

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All register bits participate in an operation

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Immediate operands of 5, 16 and 32 bits, zero- or sign-expanded

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Large address displacement of up to 28 bits

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Two sets of signed arithmetical instructions: instructions set or clear either only the

overflow flag or trap additionally to a Range Error routine on overflow

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DSP instructions operate on 16-bit integer, real and complex fixed-point data and 32-bit

integer data into 32-bit and 64-bit hardware accumulators

Instruction Summary:

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Memory instructions pipelined to a depth of two stages, trap on address register equal to

zero (check for invalid pointers)

GMS30C2116 Datasheet(PDF) 13 Page - Hynix Semiconductor

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