HDM8513 datasheet(25/67 Pages) HYNIX

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3.5 Autonomous Acquisition

The HDM8513A provides several features to permit signal acquistion with minimal interaction with

the host microcontroller. The host microcontroller must configure the HDM8513A for a specific

symbol rate, carrier frequency, carrier sweep conditions, and tracking loop bandwidth. The

microcontroller also must monitor lock status to determine when acquisition is achieved. There are

many provisions in the HDM8513A to enable the system designer to implement custom algorithms

for specific requirements.

The microcontroller first must set the lower edge of the carrier search range in the Carrier

Frequency registers (04, 05 and 06). Then the processor configures the Carrier Sweep Step Size

symbols per dwell is defined in registers (0B,0C), and is typically set to a value of 500 to 1000.

The total search range is set by the Number of Search Frequencies as defined in register 0D. The

total sweep frequency range is this number times the Carrier Sweep Step Size. The sweep

process stops once QPSK carrier lock is detected. If no lock is detected, the sweep process

continuously repeats.

The QPSK demodulator may lock to any one of four different phase reference states, only one of

which produces true I and Q data as it was modulated at the transmitter. If the local phase

reference is plus 90 degrees or minus 90 degrees with respect to the true phase, the information

provided to the Viterbi decoder will be unintelligible. If the Viterbi decoder is unable to achieve valid

lock, it will reattempt lock with a 90 degree phase shift, without external intervention.

In the event that the local phase is 180 degrees from the true phase, the data provided to the

Viterbi decoder will be inverted, but otherwise valid. The code employed by the Viterbi decoder is

transparent, thus the data from the Viterbi decoder will be inverted if the input is inverted. This

situation is corrected in the word synchronization circuit. This circuit searches for the

unscrambled sync word which occurs once per frame (every 204 bytes at the Viterbi output). Once

correlation with the sync word is found, the data is reformatted as a series of bytes with the

beginning of each 204 byte frame identified to provide the synchronization information required for

the deinterleaver and the Reed Solomon decoder. If the polarity of the sync word is incorrect, the

data is inverted before further processing without external interaction.

The HDM8513A supports five different code rates, including 1/2, 2/3, 3/4, 5/6 and 7/8. When rate

1/2 is employed, there is a one-to-one correspondence between incoming I and Q samples and G1

and G2 terms required by the Viterbi decoder. The higher rates employ punctured coding

techniques which periodically cause either a G1 or G2 term to be deleted. The puncturing pattern

can have 6 possible ambiguity states for rate 2/3, 4 states for rate 3/4, 6 states for rate 5/6 and 8

states for rate 7/8. As part of the Viterbi decoding acquisition process, each puncturing state of

each code must be tested. Total acquisition requires search of 26 different conditions. The

process starts with rate 3/4 coding and proceeds sequentially to rate 2/3, 5/6, 7/8, and finally rate

1/2.

In some systems, it may be possible to experience spectral inversion. This might occur when

different combinations of LNBs and tuners are employed which implement different frequency

translation schemes. Correction of spectral inversion must be corrected with host processor

interaction. If the host processor detects that QPSK lock is achieved, but Viterbi lock has not

occurred within a specified time, then a bit must be set in the demodulator which reverses the

spectrum.

HDM8513 Datasheet(PDF) 25 Page - Hynix Semiconductor

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