HDM8513 datasheet(47/67 Pages) HYNIX

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Wideband AGC Control

Bit 0. Wideband AGC Mode

When this bit is set to one (Mode 0), the WB AGC output must be

filtered with an external integrating analog filter to implement a first order

feedback loop. When this bit is zero (Mode 1), a digital integrator within

the HDM8513A performs this function and the only external analog

function required is a low pass filter to remove the high frequency

components of the sigma delta converter output.

Bit 1. WB AGC Invert

When this bit is set to zero a high duty factor on the WB AGC output

corresponds to too much gain. When the control bit is set to one, high

duty factor corresponds to not enough gain.

Bit 2. WB AGC Hold

During normal tracking operation, this bit is set to one. When this bit is

set to zero and the wideband AGC is in Mode 1, the digital integrator is

held to the most recent value and loop updates are inhibited.

Bit 3. LNB Hold

When this bit is set to one, the output of LNB-Tone is held on zero.

Bit 4. I2C By-pass

When this bit is set to zero, SCL_I2CO and SDA_I2CO are disabled.

The default is one and Data/clock can be by -passed.

Bits [7:5]. WB AGC Gain

This three bit field defines the time constant of the WB AGC in Mode 1.

A value of zero corresponds to the shortest time constant and 7

corresponds to the slowest time constant.

LNB Tone

This eight bit value establishes the control for LNB tone generator. If fL

is the desired frequency and fC is the clock frequency, the value to be

stored in this 8 bit field is the integer portion of fL(2

17)/fC. The default

value(30H) generates 22KHz tone at 60MHz sampling clock.

Sigma Delta

This eight bit input value establishes the control for Sigma Delta

converter. This function is independent of other demodulator functions

and is provided as control for external analog components.

HDM8513 Datasheet(PDF) 47 Page - Hynix Semiconductor