ICS1892 datasheet(117/148 Pages) ICST

117 / 148 page

Chapter 9

Pin Diagram, Listings, and Descriptions

ICS1892, Rev. D, 2/26/01

February 26, 2001

117

ICS1892

9.2.4.4

MAC/Repeater Interface Pins for Link Pulse Interface

Table 9-9 lists the MAC/Repeater Interface pin descriptions for the Link Pulse Interface.

Table 9-9.

MAC/Repeater Interface Pins: Link Pulse Interface

MII Pin

Name

Link

Pluse

Name

No.

Type

Pin Description

COL

–

Connect

Collision (Detect).

For the Link Pulse Interface, this pin is a no connect. For more

information, see Table 6-3.

CRS

–

Connect

Carrier Sense.

For the Link Pulse Interface, this pin is a no connect. For more

information, see Table 6-3.

RXER

LPRX

Output

Link Pulse (Interface) Receive Error.

This pin’s description is the same as that given in Table 9-6.

RXCLK

LRCLK

Output

Link (Pulse Interface) Receive Clock.

The ICS1892 sources the LRCLK to the MAC/repeater. The

ICS1892 uses LRCLK to synchronize the signals on the LPRX

pin. The signal on the LRCLK pin is conditioned by RXTRI.

MDC

Input

Management Data Clock.

This pin’s description is the same as that given in Table 9-6.

MDIO

Input/

Output

Management Data Input/Output.

This pin’s description is the same as that given in Table 9-6.

RXD0,

RXD1,

RXD2,

RXD3

–35,

34,

33,

Connect

Receive Data 0–3.

For the Link Pulse Interface, these pins are a no connect. For

more information, see Table 6-3.

RXDV

–

Connect

Receive Data Valid.

For the Link Pulse Interface, this pin is a no connect. For more

information, see Table 6-3.

RXER

LPRX

Output

Link Pulse (Interface) Receive Error.

This pin’s description is the same as that given in Table 9-6.

RXTRI

Input

Receive (Interface), Tri-State.

The input on this pin is from a MAC. When the signal on this pin is

logic:

• Low, the MAC indicates that it is not in a tri-state condition.

• High, the MAC indicates that it is in a tri-state condition. In this

case, the ICS1892 acts to ensure that only one PHY is active

at a time.

TXCLK

LTCLK

Link (Pulse Interface) Transmit Clock.

This pin’s description is the same as that given in Table 9-6.

TXD0,

TXD1,

TXD2,

TXD3

–45,

46,

47,

Connect

Transmit Data 0–3.

For the Link Pulse Interface, these pins are a no connect. For

more information, see Table 6-3.

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