3

ICS9148-11

Power-On Conditions

Example:

a) if MODE = 1, pins 28, 29 and 31 are configured as SDRAM7, SDRAM6 and SDRAM5 respectively.

b) if MODE = 0, pins 28, 29 and 31 are configured as PCI_STOP#, CPU_STOP# and PWR_DWN# respectively.

Power-On Default Conditions

At power-up and before device programming, all clocks will default to an enabled and “on” condition. The frequencies that are then

produced are on the FS and MODE pin as shown in the table below.

CLOCK

DEFAULT CONDITION AT POWER-UP

REF 0

14.31818 MHz

IOAPIC (0:1)

14.31818 MHz

MODE

PIN #

DESCRIPTION

FUNCTION

1

44, 43, 41, 40

CPUCLKs

66.6 MHz - w/serial config enable/disable

38, 37, 35, 34,

32, 31, 21, 20,

18, 17, 29, 28

SDRAM

66.6 MHz - All SDRAM outputs

8, 10, 11,

12, 14, 15, 7

PCICLKs

33.3 MHz - w/serial config enable/disable

0

28

PCI_STOP#

Power Management, PCI (0:5) Clocks Stopped

when low

29

CPU_STOP#

Power Management, CPU (0:3) Clocks Stopped

when low

31

SDRAM/PWR

_DWN#

Used as PWR_DWN# when low

7

PCICLK_F

33.3 MHz - 33.3 MHz - PCI Clock Free running for

Power Management

44, 43, 41, 40

CPUCLKs

66.6 MHz - CPU Clocks w/external Stop Control and

serial config individual enable/disable.

38, 37, 35,

34, 32, 21,

20, 18, 17

SDRAM

66.6 MHz - SDRAM Clocks w/serial config individual

enable/disable.

8, 10, 11,

12, 14, 15

PCICLKs

33.3 MHz - PCI Clocks w/external Stop control and

serial config individual enable/disable.