MK1418/MK1420

OPL3, OPL4 + Codec Clock Source

MDS 1418/20 A

2

Revision 013098

Printed 11/15/00

MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax

Number

Name

Type

Description

1

X1

I

Crystal Connection. Connect to a 14.318 MHz crystal or clock.

2

VDD

P

Connect to +5V.

3

GND

P

Connect to ground.

4

16.9M

O

16.9344 MHz clock output for stereo codec.

5

24.6M

O

24.576 MHz clock output for stereo codec.

6

33.9M

O

33.868 MHz clock output for OPL4.

7

14.3M

O

14.318 MHz clock buffered output for OPL3 or PCMCIA controller.

8

X2

O

Crystal Connection to a 14.318 MHz crystal, or leave unconnected for clock input.

Pin Descriptions for MK1420

Key: I = Input, O = output, P = power supply connection

Pin Assignments

1

8

2

3

4

7

6

5

X1

VDD

GND

16.9M

X2

14.3M

33.9M

24.6M

Suggested Layout

for MK1420

External Components/Crystal Selection

A minimum number of external components are required for proper oscillation. For a crystal input, one

22pF load capacitor should be connected to each of the X1 and X2 pins and ground, and a parallel

resonant 14.318 MHz, 16pF load, crystal is recommended. Values near these are acceptable, as is a series

resonant crystal, but either will result in frequencies which are slightly (up to 0.06%) different from the

ideal. For a clock input, connect to X1 and leave X2 unconnected. A decoupling capacitor of 0.1µF should

be connected between VDD and GND, and 33

Ω terminating resistors may be used on the clock outputs.

These terminating resistors are unnecessary for clock traces less than 1” (25mm).

14.318 MHz

crystal

Pin 1

33

Ω (optional)

2

3

5

6

7

0.1µF

16.9MHz out

24.6MHz out

G

V

33

Ω (optional)

4

8

33

Ω (optional)

33

Ω (optional)

14.3MHz out

33.9MHz out

MK1420

MK1418

1

8

2

3

4

7

6

5

ICLK

VDD

GND

16.9M

GND

VDD

GND

24.6M

clock only