MK2703

PLL Audio Clock Synthesizer

MDS 2703 C

2

Revision 062700

Printed 11/16/00

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com

I C R O

Pin Descriptions

Key: XI, XO = Crystal connections; I(PU)= Input with internal pull-up resistor; O = output;

P = power supply connection

Pin Assignment

MK2703

Key:

0 = connect pin directly to ground

1 = connect pin directly to VDD

1

8

2

3

4

7

6

5

X1

S0

GND

X2

VDD

CLK

8 pin SOIC

27M

S1

S1

S0

CLK

0

0

8.192

0

1

11.2896

1

0

12.288

1

1

24.576

Audio Clock Output Select Table (MHz)

Number

Name

Type Description

1

X1

XI

Crystal Connection. Connect to a 27.0 MHz fundamental crystal or clock.

2

VDD

P

Connect to +3.3V or +5V.

3

GND

P

Connect to ground.

4

27M

O

27.00 MHz buffered reference clock output.

5

CLK

O

Audio Clock Output per table above.

6

S1

I(PU) Audio Clock Frequency Select Input #1. Determines CLK output per table above.

7

S0

I(PU) Audio Clock Frequency Select Input #0. Determines CLK output per table above.

8

X2

XO Crystal Connection to a 27.0 MHz crystal, or leave unconnected for clock input.