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AD9624 Datasheet(PDF) 5 Page - Analog Devices

Part # AD9624
Description  Wideband Voltage Feedback Amplifier
PDF  6 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9624 Datasheet(HTML) 5 Page - Analog Devices

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OBSOLETE
AD9624
REV. 0
–5–
–
Typical Performance (R
L = 100
; AV = +8, unless otherwise noted)
80
60
40
20
0
–20
0
+15
+30
+45
+60
+75
+90
–15
–30
–45
–60
FREQUENCY – Hz
10k
100k
1M
10M
100M
600M
GAIN
PHASE
Figure 4. Open-Loop Gain and
Phase
110
24
6
20
40
60
FREQUENCY – MHz
–50
–60
–70
–80
–90
–100
–110
–120
2nd HARMONIC
R
L = 100Ω
3rd HARMONIC
R
L = 500Ω
2nd HARMONIC
R
L = 500Ω
V
OUT = 2V p-p
3rd HARMONIC
R
L = 100Ω
Figure 7. Harmonic Distortion
vs. Frequency
+2
0
–2
–4
–6
–8
+180
+135
+90
+45
0
–45
–90
–135
–180
FREQUENCY – MHz
50
100 150
200
250 300 350 400
450 500
R
LOAD = 500Ω
R
LOAD = 50Ω
AV = 8
R
FB = 510Ω
R
FF = 75Ω
Figure 10. Frequency Response
vs. RLOAD
FREQUENCY – Hz
10
8
6
4
2
1
102
103
10 4
105
106
10
8
6
4
2
1
VOLTAGE
CURRENT
Figure 13. Input Spectral Noise
Density
+2
0
–2
–4
–6
–8
+180
+135
+90
+45
0
–45
–90
–135
–180
FREQUENCY – MHz
50
100
150
200
250 300
350 400 450 500
A
V = –5
A
V = –7, –10
A
V = –5
A
V = –10
A
V = –7
Figure 5. Inverting Frequency
Response
1
100
10
FREQUENCY – MHz
50
10
40
30
50
50
OUT
20
Figure 8. Intermodulation Distortion
(IMD)
+0.1
–0.1
–0.04
–0.08
–0.06
+0.02
–0.02
0
+0.04
+0.06
+0.08
50
040
30
20
10
TIME – ns
V
OUT = 2V STEP
TEST CIRCUIT
100
Ω
6pF
Figure 11. Third Order Intercept
SUPPLY VOLTAGE –
±Volts
5.5
5.0
4.5
4.0
3.5
4
3
2
27
23
19
VOLTAGE
CURRENT
Figure 14. Output Level and Supply
Current vs. Supply Voltage
+2
0
–2
–4
–6
–8
+180
+135
+90
+45
0
–45
–90
–135
–180
FREQUENCY – MHz
50
100 150
200 250 300 350
400
450
500
A
V = 16
A
V = 6
A
V = 8
Figure 6. Noninverting Frequency
Response
+20
+45
+70
+25
+30
+35
+40
+50
+55
+60
+65
CMRR
110
1G
10M
1M
100k
10k
1k
100
100M
FREQUENCY – Hz
PSRR
Figure 9. CMRR and PSRR vs.
Frequency
100K
1
10K
1K
100
10
TIME – ns
0.1
–0.1
–0.04
–0.08
–0.06
0.02
–0.02
0
0.04
0.06
0.08
TEST CIRCUIT
100
Ω
6pF
V
OUT = 2V STEP
Figure 12. Long-Term Settling Time
10
30
18
14
22
26
30
18
14
22
26
10
100
10
1
C
LOAD – pF
R
S
t
SETTLING
R
S
1k
C
L
73
510
Figure 15. Settling Time vs.
Capacitive Load



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