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450NX Datasheet(PDF) 13 Page - Intel Corporation |
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450NX Datasheet(HTML) 13 Page - Intel Corporation |
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13 / 248 page ![]() Intel ® 450NX PCIset 2-1 2 Signal Descriptions This chapter provides a detailed description of all signals used in any component in the Intel® 450NX PCIset. 2.1 Conventions The terms assertion and deassertion are used extensively when describing signals, to avoid confusion when working with a mix of active-high and active-low signals. The term assert, or assertion, indicates that the signal is active, independent of whether the active level is represented by a high or low voltage. The term deassert, or deassertion, indicates that the signal is inactive. The “#” symbol at the end of a signal name indicates that the active, or asserted state occurs when the signal is at a low voltage level. When “#” is not present after the signal name the signal is asserted when at the high voltage level. When discussing data values used inside the chip set, the logical value is used; i.e., a data value described as "1101b" would appear as "1101b" on an active-high bus, and as "0010b" on an active-low bus. When discussing the assertion of a value on the actual pin, the physical value is used; i.e., asserting an active-low signal produces a "0" value on the pin. The following notations are used to describe the signal type: The signal description also includes the type of buffer used for the particular signal: I Input pin O Output pin I/O Bidirectional (input/output) pin OD Open drain output pin (other than AGTL+ signals) AGTL+ Open drain AGTL+ interface. PCI PCI-compliant 3.3 V/5 V-tolerant interface LVTTL Low-voltage (3.3 V) TTL-compatible signals. 2.5V 2.5 V CMOS signals. Analog Typically a voltage reference or specialty power supply. |
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