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450NX Datasheet(PDF) 20 Page - Intel Corporation |
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450NX Datasheet(HTML) 20 Page - Intel Corporation |
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20 / 248 page ![]() 2-8 Intel ® 450NX PCIset 2. Signal Descriptions RSP# Response Parity Signal AGTL+ I/O Parity protection on RS[2:0]#. TRDY# Target Ready AGTL+ I/O Indicates that the target of the system transaction is able to enter the data transfer phase. 2.3.2 Third-Party Agent / MIOC Interface The following signals provide support for an additional non-processor, third-party agent (TPA) on the system bus. Such agents may need priority access to the system bus itself, or may need to intervene in transactions between the processors and the Intel® 450NX PCIset. IOGNT# I/O Grant LVTTL I The IOGNT# signal has two modes: Internal Arbitration Mode and External Arbitration Mode, selected by a bit in the MIOC’s CONFIG register. In Internal Arbitration Mode IOGNT# is an input from another bridge device which is requesting ownership of the BPRI# signal. In external arbitration mode, this bridge requests BPRI# ownership from an external bridge arbiter. IOGNT# should be asserted by the external arbiter when this MIOC has been granted ownership of the BPRI# signal. IOREQ# I/O Request LVTTL O The IOREQ# signal has two modes: Internal Arbitration Mode and External Arbitration Mode, selected by a bit in the MIOC’s CONFIG register. In Internal Arbitration Mode IOREQ# is the grant to another bridge device that is making a request for ownership of the BPRI# signal. In external arbitration mode this signal is asserted to request ownership of the BPRI# signal. TPCTL[1:0] Third Party Control LVTTL I These signals allow an agent participating in transactions between the Intel® 450NX PCIset and another bus agent as a “third-party” to control the responses generated by the Intel 450NX PCIset. 2.4 PCI Interface 2.4.1 Primary Bus There are two primary PCI buses per PXB, identified as the “a” bus and the “b” bus groups. Each signal name includes a “p”, indicating the PCI bus port; p = A or B. 00 Accept The MIOC will accept the request and provide the normal response. 01 reserved – 10 Retry The MIOC will generate a RETRY response. 11 Defer The MIOC will generate a DEFERRED response. |
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