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82C55 Datasheet(PDF) 11 Page - Intel Corporation |
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82C55 Datasheet(HTML) 11 Page - Intel Corporation |
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11 / 23 page ![]() 82C55A Input Control Signal Definition STB (Strobe Input) A ‘‘low’’ on this input loads data into the input latch IBF (Input Buffer Full FF) A ‘‘high’’ on this output indicates that the data has been loaded into the input latch in essence an ac- knowledgement IBF is set by STB input being low and is reset by the rising edge of the RD input INTR (Interrupt Request) A ‘‘high’’ on this output can be used to interrupt the CPU when an input device is requesting service INTR is set by the STB is a ‘‘one’’ IBF is a ‘‘one’’ and INTE is a ‘‘one’’ It is reset by the falling edge of RD This procedure allows an input device to re- quest service from the CPU by simply strobing its data into the port INTE A Controlled by bit setreset of PC4 INTE B Controlled by bit setreset of PC2 231256 – 13 Figure 8 MODE 1 Input 231256 – 14 Figure 9 MODE 1 (Strobed Input) 11 |
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