8

ADVANCE INFORMATION

83C196LC, 83C196LD — AUTOMOTIVE

P4.7:0

I/0

Port 4

This is a memory-mapped, 8-bit, bidirectional port with open-drain or

complementary output modes. The pins are shared with the multiplexed

address/data bus, which has complementary drivers.

P4.7:0 share package pins with AD15:8.

P5.3:2

P5.0

I/O

Port 5

This is a memory-mapped, bidirectional port.

Port 5 shares package pins with the following signals: P5.0/ADV#/ALE,

P5.2/WR#/WRL#/PLLEN, and P5.3/RD#. P5.1 and P5.7:4 are not

implemented.

P6.7:4

P6.1:0

OPort 6

This is a standardbidirectional port.

Port 6 shares package pins with the following signals: P6.0/EPA8/COMP0,

P6.1/EPA9/COMP1, P6.4/SC0, P6.5/SD0, P6.6/SC1, and P6.7/SD1.

RD#

O

Read

Read-signal output to external memory. RD# is asserted during external

memory reads.

RD# shares a package pin with P5.3.

RESET#

I/O

Reset

A level-sensitive reset input to, and an open-drain system reset output from, the

microcontroller. Either a falling edge on RESET# or an internal reset turns on a

pull-down transistor connected to the RESET# pin for 16 state times.

In the powerdown and idle modes, asserting RESET# causes the

microcontroller to reset and return to normal operating mode. After a reset, the

first instruction fetch is from 2080H.

RXD

I/O

Receive Serial Data

In modes 1, 2, and 3, RXD receives serial port input data. In mode 0, it

functions as either an input or an open-drain output for data.

RXD shares a package pin with P2.1.

SC1:0

I/O

Clock Pins for SSIO0 and 1

SC0 shares a package pin with P6.4, and SC1 shares a package pin with P6.6.

SD1:0

I/O

Data Pins for SSIO0 and 1

These pins are the data I/O pins for SSIO0 and 1. For transmissions, configure

SD

high-impedance input signal.

SD0 shares a package pin with P6.5, and SD1 shares a package pin with P6.7.

T2CLK

I

Timer 2 External Clock

External clock for timer 2. Timer 2 increments (or decrements) on both rising

and falling edges of T2CLK. It is also used in conjunction with T2DIR for

quadrature counting mode.

T2CLK shares a package pin with P1.0 and EPA0.

Table 4. Signal Descriptions (Continued)

Name

Type

Description